Search results: tag:"hdl coder" - MATLAB Answers

Unanswered

Clear Filters

97 questions found in Answers

Results 1 - 50 of 97

0

answers

0 votes
3 views

Getting Error while using HDL Coder

Asked by Ashwani on 23 Jun 2025

Latest activity Commented on by Harald on 23 Jul 2025

FPGA, ASIC, and SoC Development

0

answers

0 votes
5 views

SoC Builder Error: The specified key is not present in this container.

Asked by Vu Hoang Thang Chau on 11 Dec 2023

Latest activity Edited by Sergei on 20 Jun 2025

Code Generation

0

answers

0 votes
5 views

HDL Workflow Advisor -- Error Connecting to SSH Server

Asked by Ezenia on 25 Feb 2025

Latest activity Edited by Justin on 31 Mar 2025

Code Generation HDL Coder HDL Coder Supported Hardware Xilinx Zynq Platform

0

answers

0 votes
2 views

HDL Coder and Bitstream Programming Insight Needed

Asked by Thomas J Kelly on 23 Aug 2024

Latest activity Commented on by Sahas on 11 Mar 2025

Code Generation HDL Coder HDL Coder Supported Hardware AMD FPGA and SoC Devices

0

answers

0 votes
0 views

HDL Workflow Advisor error when programming target device -- Invalid argument at position 3. Value must be text with one or more characters

Asked by Ezenia on 25 Feb 2025

Latest activity Edited by Sahas on 4 Mar 2025

Code Generation HDL Coder HDL Code Generation from Simulink Programmatic Workflow

0

answers

0 votes
2 views

Build Linux Image for HDL Coder

Asked by John on 24 Feb 2025

Latest activity Commented on by John on 24 Feb 2025

Code Generation

0

answers

0 votes
3 views

HDL Coder Support Package for Intel FPGA and SoC Devices Setup

Asked by John on 7 Feb 2025

Latest activity Edited by John on 21 Feb 2025

Code Generation HDL Coder

0

answers

0 votes
2 views

Use Conduit Interface in HDL Coder

Asked by John on 20 Feb 2025

Code Generation

0

answers

0 votes
0 views

Mathworks ipcore test using axi4stream in linux

Asked by El Hachimi on 17 Dec 2024

Code Generation HDL Coder Targeting FPGA & SoC Hardware

0

answers

0 votes
0 views

hdlset_param question

Asked by GLW on 25 Jul 2024

Latest activity Edited by Umar on 2 Aug 2024

Code Generation HDL Coder Get Started with HDL Coder

0

answers

0 votes
1 view

How do we get the linux device driver files matlab/hdl coder generatwes for the ipcore we made in matlab?

Asked by ivan on 29 Jul 2024

Latest activity Commented on by Umar on 29 Jul 2024

Code Generation HDL Coder HDL Coder Supported Hardware AMD FPGA and SoC Devices

0

answers

0 votes
0 views

working on ZYNQ 706 using MATLAB

Asked by Hassan Khan on 1 Jul 2024

Latest activity Commented on by Abhishek Kumar Singh on 1 Jul 2024

FPGA, ASIC, and SoC Development

0

answers

0 votes
0 views

ZEDBOARD UART-USB matlab setup on linux

Asked by rohith gopakumar on 1 Apr 2024

Latest activity Edited by Rohith on 21 May 2024

Code Generation HDL Coder HDL Coder Supported Hardware AMD FPGA and SoC Devices

0

answers

0 votes
1 view

HDL Coder bus length interface not appropriate

Asked by Federico Gelmetti on 5 Mar 2024

Code Generation HDL Coder HDL Coder Supported Hardware AMD FPGA and SoC Devices

0

answers

0 votes
1 view

How to find indices of array in hdl coder?

Asked by Siddarth S on 25 Feb 2024

Latest activity Edited by Siddarth S on 5 Mar 2024

Code Generation

0

answers

0 votes
3 views

CCSDS TM HDL Receiver implemenation in Zed board.

Asked by VISHNU on 23 Dec 2023

Latest activity Commented on by Kranti Balaga on 28 Dec 2023

Code Generation HDL Coder Targeting FPGA & SoC Hardware

0

answers

0 votes
2 views

is it possible to prevent the compiler from using variables in generated VHDL code?

Asked by Eldin Ramic on 9 Nov 2023

Latest activity Commented on by Tom Richter on 9 Nov 2023

Code Generation

0

answers

0 votes
0 views

Device Driver Source Codes for HDL Design Generated Through HDL Coder MATLAB

Asked by britt roy on 22 May 2023

Code Generation

0

answers

0 votes
7 views

how to make HDL coder optimize the multiplication with a small constant to shift right?

Asked by Zora Aria Jade on 26 Apr 2023

Latest activity Commented on by Bharath Venkataraman on 1 May 2023

Code Generation

0

answers

0 votes
2 views

HDL Coder Guided Hardware Setup for HDL Verifier Support Package Xilinx

Asked by Dr. W. Kurt Dobson on 12 Feb 2023

Latest activity Commented on by Dr. W. Kurt Dobson on 12 Feb 2023

Code Generation HDL Coder HDL Coder Supported Hardware AMD FPGA and SoC Devices

0

answers

0 votes
6 views

Software Interface generation issue in HDL Coder step 4.2

Asked by Rizwan on 25 Oct 2022

Latest activity Commented on by Rizwan on 13 Jan 2023

Code Generation

0

answers

0 votes
1 view

Is there an option to generate HDL code with "Bus Data Read/Write with Strobe Synchronization"?

Asked by Jean-Guilhem Dalissier on 13 Oct 2022

Code Generation HDL Coder

0

answers

0 votes
5 views

unsupported functions by hdl coder

Asked by Aloka Perera on 21 Aug 2019

Latest activity Commented on by A.Arun Bennett on 2 Aug 2022

Code Generation HDL Coder HDL Coder Supported Hardware AMD FPGA and SoC Devices

0

answers

0 votes
2 views

HDL QPSK Transmitter and Receiver example problem

Asked by Jiri Voltner on 23 Mar 2022

Latest activity Commented on by Kranti Balaga on 28 Mar 2022

Code Generation Simulink Coder

0

answers

0 votes
4 views

2021a Error executing command "mw_setboot" command not found

Asked by ao sun on 18 Feb 2022

Latest activity Edited by ao sun on 18 Feb 2022

Code Generation HDL Coder HDL Coder Supported Hardware AMD FPGA and SoC Devices

0

answers

0 votes
0 views

Matlab's QPSK HDL design

Asked by Sina Rafati on 17 Feb 2022

Latest activity Edited by Sina Rafati on 17 Feb 2022

Code Generation

0

answers

1 vote
3 views

Simulink connect to Zynq-7020 board failed.

Asked by zhouwb02 on 21 Dec 2020

Latest activity Commented on by Vegard Steinsland on 22 Oct 2021

Code Generation HDL Coder Targeting FPGA & SoC Hardware

0

answers

0 votes
1 view

USB UART not connected 'hdlcoder_led_blinking' working on zc706

Asked by karthik sharma on 19 Oct 2021

Code Generation HDL Coder HDL Coder Supported Hardware AMD FPGA and SoC Devices

0

answers

0 votes
0 views

How to specify the HDL Latency of Discrete FIR Filter block manually?

Asked by ALi Falahati on 18 Aug 2021

Latest activity Edited by Bharath Venkataraman on 25 Aug 2021

Signal Processing DSP System Toolbox Code Generation HDL Code Generation

0

answers

0 votes
0 views

External Mode in Custom Soc

Asked by anuj maheshwari on 18 May 2021

Code Generation HDL Coder Targeting FPGA & SoC Hardware

0

answers

0 votes
0 views

I'm trying to interface spartan 6-LX9 FPGA board with MATLAB2015a. At the time of doing configuration it's asking Signal/Parameter List, but i don't know the pin for Transmitter Error (ETH_TXER).

Asked by Prashant Narode on 29 Jun 2017

Latest activity Commented on by Luis Montero on 3 May 2021

FPGA, ASIC, and SoC Development

0

answers

0 votes
1 view

How to download elf file into zynq board

Asked by zhouwb02 on 25 Jan 2021

Latest activity Commented on by zhouwb02 on 28 Jan 2021

FPGA, ASIC, and SoC Development

0

answers

0 votes
1 view

Simulink System Object forces hardcoded size for reshape function.

Asked by Eduardo Flores on 31 Dec 2020

Latest activity Edited by Uday Pradhan on 5 Jan 2021

Robotics and Autonomous Systems ROS Toolbox Specialized Messages

0

answers

0 votes
0 views

HDL Coder Zedboard example led_blinking_4bit: Port-width of LED-Interface

Asked by Niklas Weis on 2 Sep 2020

Code Generation HDL Coder HDL Coder Supported Hardware AMD FPGA and SoC Devices

0

answers

0 votes
0 views

The function 'lsqnonlin' is not supported for standalone code generation.

Asked by radhia bouazizi on 3 Jun 2020

Code Generation

0

answers

0 votes
1 view

MATLAB script use in System verilog using SNPS VCS tool

Asked by ansuman mishra on 25 May 2020

Code Generation

0

answers

0 votes
0 views

Generate Test Bench Causes Error -- "Operands to the || and && operators must be convertible to logical scalar values"

Asked by Jon Howard on 19 Apr 2020

Latest activity Commented on by Jon Howard on 20 Apr 2020

Code Generation HDL Coder Get Started with HDL Coder

0

answers

0 votes
1 view

How to have multiple clock inputs on IP Core generated by HDL Coder?

Asked by Alex Aronov on 13 Mar 2020

Code Generation HDL Coder HDL Coder Supported Hardware AMD FPGA and SoC Devices

0

answers

1 vote
1 view

Dual clock Simulink design to implement in HDL Coder using "clock_enable" constraint

Asked by Alex Aronov on 3 Feb 2020

Code Generation HDL Coder HDL Code Generation from Simulink Model and Architecture Design Clocking and Multirate Design

0

answers

0 votes
0 views

I have followed the following link for ip core generation of an I2C controller for zybo but it is giving me errors

Asked by Fizza Akram on 11 Jan 2020

Code Generation

0

answers

0 votes
1 view

Simulink HDL Coder complex conjugate

Asked by Karen Stephen on 21 Sep 2019

Latest activity Commented on by Karen Stephen on 23 Sep 2019

Signal Processing DSP System Toolbox Signal Generation, Manipulation, and Analysis Signal Generation

0

answers

1 vote
2 views

Error in HDL Code Generation "Colon operands must have integer values when interacting with type 'embedded.fi'."

Asked by Alexander Letzel on 15 Apr 2019

Code Generation HDL Coder HDL Coder Supported Hardware AMD FPGA and SoC Devices

0

answers

0 votes
8 views

How to configure a correct Duration value in "External Mode Ctrl Panel -> Configure Trigger Options"

Asked by Andrea Foradori on 24 Jan 2019

Code Generation Embedded Coder Deployment, Integration, and Supported Hardware

0

answers

0 votes
0 views

FATAL_ERROR:Xst:listutil.c:503:1.19 - Data corruption (ListDelShift) - Bad Index Process will terminate.

Asked by stellarpranav on 8 Jan 2019

Code Generation HDL Coder HDL Coder Supported Hardware AMD FPGA and SoC Devices

0

answers

0 votes
1 view

NMAKE: Fatal Error U1077 when compiling a block generated by HDL Coder

Asked by Alex Yuen on 8 Oct 2018

Code Generation Simulink Coder

0

answers

0 votes
0 views

HDL Code generation does not support 2D-matrices as function inputs.

Asked by Sarker Asish on 3 Oct 2018

Latest activity Edited by KSSV on 3 Oct 2018

Code Generation MATLAB Coder

0

answers

0 votes
3 views

Why would I NOT set the native floating point latency strategy to ZERO?

Asked by Anthon Voigt on 12 Jun 2018

Code Generation HDL Coder HDL Code Generation from Simulink Model and Architecture Design Native Floating Point

0

answers

0 votes
3 views

I am getting an error Undefined function or variable ***. The first assignment to a local variable determines its class.

Asked by Abhijith Nuchin on 16 Apr 2018

Latest activity Commented on by KSSV on 16 Apr 2018

Code Generation HDL Coder HDL Code Generation from MATLAB Speed and Area Optimization

0

answers

0 votes
0 views

Error in converting function into fixed point using HDL coder.

Asked by Bharat Harijan on 10 Mar 2018

Latest activity Commented on by Bharat Harijan on 15 Mar 2018

Code Generation HDL Coder HDL Code Generation from MATLAB Speed and Area Optimization

0

answers

0 votes
1 view

Issue to make log10 hdl code by using hdlcoder

Asked by satish guruma on 9 Feb 2018

Latest activity Edited by satish guruma on 9 Feb 2018

Code Generation HDL Coder Real-Time Hardware Deployment Simulink Real-Time FPGA I/O Modules

Results 1 - 50 of 97

Filter By

Status Clear

Source Clear

Category Clear

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0