I am trying to implement 8-bit twos complement addition. I am doing this by splitting the 8 bit inputs into 4 bit parts and then implementing 4 bit complement addition.
A well known diagram is
where V captures the overflow from the addition.
My question: to capture the overflow accurately, does it suffice to capture the overflow at the last steps (final carry and previous carry) in the 8 bit circuit, or do I need to capture the overflow at the last steps in the 4 bit circuit, then somehow combine them in the 8 bit circuit?
