Design of current boost converter part 2

We use switching converters to obtain good efficiency.

In your schematic, the switch shorts the input current source. So, unless the input current source is actually an inductor that will store energy, during the part of the cycle when the switch is on, energy will be lost. If the source is photovoltaic, or anything else that is a current source but not an inductor, then when it is shorted, it won't produce any energy, and it doesn't store the energy it would have produced either. Thus the efficiency of this system will be quite low.

If the input current source has inductive properties, then this problem does not occur. However, by drawing the inductor, we get pretty close to a Cuk converter without the output cap:

Thus, "Current fed" DC-DC converters generally have an inductor at the input for efficiency reasons. They pretty much also require an input filter to avoid spraying noise and EMI everywhere, which implies an input cap. Also, the input current source probably will only behave as a current source up to a certain frequency, for example solar panels are voltage limited current sources at low frequency, but they also have quite large capacitance... and all these caps behave much more as voltage sources than current sources.

So... the line between "Voltage fed" and "Current fed" DC/DC converter becomes a little bit blurry.

Let's start with a standard buck converter, fed by a current source:

When the high side switch is open, without C1, the current source would be unloaded. With an ideal current source, voltage would become infinite. That wouldn't work, so we need to at least add C1.

This is the "current boost converter" from your previous question. It reduces voltage, so it's a voltage buck, but it increases current, so we can call it "current boost". When the High Side switch is open, energy from the input current source charges C1, storing energy. When the High Side switch is closed, both current flows from both I1 and C1 into L2.

Neglecting losses, output current will be Iout = Iin (1-D) with D being the duty cycle of the high side switch. In this case, Iin=1A, D=0.5, so Iout is close to 2A.

In the simulator, there will be oscillations at the beginning, as you noticed:

This comes from initial conditions. The simulator begins with a DC analysis, during which the switches are either open or closed. No matter which one, this is not the same as the circuit operating and switching. So it will determine an initial operating point, notably voltage on C1, which is completely different from the steady state with the circuit is operating.

In the above case, during DC analysis, both switches are open, so the due to the current source, voltage on C1 increases until the top MOSFET breaks down and avalanches, acting a bit like a Zener diode, so input current flows through it. This sets the initial condition on inductor current, which is equal to I1, then load current.

After these initial conditions are calculated, the circuit begins to operate and switch. The pair of switches act in fact as an impedance transformer.

The impedance seen by the pin on the left of L2 is:

• With the High Side switch ON, during duty cycle D, it is connected to the input, so it's the impedance of C1 in parallel with the current source which has infinite impedance, so just C1.

• With the High Side switch OFF, during duty cycle 1-D, it is connected to ground, so it sees close to 0 ohms (neglecting MOSFET RdsON).

The average impedance seen by the left pin of L2 is the average of these, in other words: D times C1.

Here, D=0.5, with the circuit operating and switching, the left pin of L2 sees a "virtual" capacitor which is twice the capacitance of C1, so we have this equivalent circuit:

At the beginning of the simulation, C1 is charged by the current source. The above is a LC resonant circuit, so... it'll resonate and exhibit damped oscillations.

All DC/DC converters using inductors and caps exhibit this phenomena. It is usually hidden, because the controller chip uses feedback to remain in control of the circuit, but in this case, duty cycle is fixed so it is visible.

There is no way around it, except to give it adequate damping factor from the choice of component values and duty cycle.

Now let's make a Current Buck converter... in other words a voltage boost, by flipping it left to right.

It has the same issue of transient damped oscillations. Once settled into the steady state, output current is half the input current.

However, this circuit can only boost voltage so the load resistor must be of high enough value to ensure output voltage remains higher than input voltage. The previous circuit exhibits the mirror behavior since it can only reduce voltage, load resistance must be low enough to ensure Vin>Vout.

To remove this constraint, you'll need a voltage buck-boost circuit, which allows output voltage to be above or below input voltage, then turn it into a current-input current-output DC/DC converter.

Transistors are controlled by a voltage (or current, or history-dependent combination thereof) between their input and common terminals. For the BJT shown here, that's B and E.

The one-terminal clock source is a somewhat peculiar component. One-terminal components in simulations are always ground referenced: the ground terminal is implicit.

You want to apply a clock signal to the BJT, B-E, but E isn't at GND as it was in your previous circuit (I assume you want to get https://i.sstatic.net/Vi6bsYth.png to work better, not the image shown here at time of writing?)

An E-source (as SPICE would call it), VCVS (voltage controlled voltage source), will do what you need.

$ 1 3.125e-7 382.76258214399064 50 5 43 5e-11
i 192 208 192 112 0 0.01
r 336 112 448 112 0 10
l 448 112 448 208 0 0.001 0.002500016896635457 0
w 336 208 448 208 0
t 224 144 256 144 0 1 0.6323481297958121 0.670960546039347 100 default
w 224 144 224 272 0
R 80 272 48 272 0 2 100000 5 0 0 0.75
c 336 112 336 208 4 0.001 0.025009217324080086 0.001 0
d 272 112 336 112 2 default
w 272 112 256 112 0
w 256 112 256 128 0
w 256 176 256 208 0
w 304 208 336 208 0
w 192 208 256 208 0
w 192 112 256 112 0
g 304 208 304 240 0 0
r 176 272 224 272 0 1000
212 80 272 96 272 0 2 1*(a-b)
w 176 304 240 304 0
w 240 304 240 176 0
g 48 304 48 320 0 0
w 48 304 80 304 0
w 256 208 304 208 0
w 256 176 256 160 0
w 256 176 240 176 0
o 1 512 0 4099 0.0390625 0.003125 0 4 1 3 2 0 2 3

This starts from the above posted circuit, which doesn't do very much, but you should see now what the idea is.

Alternately, use a two-terminal source and tie its far end to E instead of GND.

The bouncing is due to the LC resonance created between the energy-storage element (the capacitor) and the load inductance. Exactly as a voltage-type converter can resonate between its energy-storage inductor and input or output capacitors. These values are stable because \$R > \sqrt{\frac{L}{C}}\$, whereas your above example has R much smaller.