RAM can be enforced in a synthesis tool by using synthesis attributes in the generated HDL code.
Currently (R2018a), HDL Coder does not have the ability to insert these synthesis attributes.
However, a common modeling pattern for lookup tables produces HDL code that is usually mapped to RAM. For more information on the same, please run the following command on MATLAB R2018a:
web(fullfile(docroot, 'hdlcoder/examples/getting-started-with-ram-and-rom-in-simulink.html'))
If this approach does not map to RAM for a particular model, please contact MathWorks Technical Support.
Please follow the below link to search for the required information regarding the current release:
