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Is there any way to latch data in combinational circuit when it differs from zero and keep it latched as long as clear signal is '0'. So I have no clock signal, no latch trigger. I tried this:

library IEEE;
use IEEE.STD_LOGIC_1164.ALL;

entity tester is
    Port ( inData       : in  std_logic_vector(3 downto 0);
           inClear      : in  std_logic;
           outStatus        : out std_logic_vector(3 downto 0)         
           );
end tester;

architecture Behavioral of tester is

signal Data :  std_logic_vector(3 downto 0);
signal NotZero :  std_logic;


begin

with inData select
NotZero <=  '0' when "0000",
            '1' when others;

Data <= inData when (NotZero = '1') else Data;
outStatus <= Data;

end Behavioral;

But when inData goes back to zeros outStatus does the same.

3
  • In a synthesized application there may be no guarantee of the propagation times of elements of inData which means NotZero may not be glitch free. You shouldn't produce latch enables combinationally. Commented Jul 25, 2019 at 18:22
  • Why would you want to do this? Commented Jul 26, 2019 at 11:41
  • This is Static Hazard 101 - look it up. If you can't fix the VHDL to correctly cover the hazard, ask again and I'll post the code. It is very unlikely that the synth will correctly cover the hazard if you don't explicitly code the gates. You should also have posted your testbench, so that we know why you think it doesn't work. Commented Jul 26, 2019 at 13:29

1 Answer 1

2

This looks like a delta race condition where NotZero and Data are both dependent on inData, but Data is also dependent on NotZero = '1'. NotZero changes to '0' in the current delta cycle, but the Data expression has not seen this update. Data is responding to the previous delta iteration where inData changed to "0000" and NotZero was still '1'.

Your synthesis tool is likely smart enough to remove the intermediate NotZero signal, and then you would not see the issue in real-life.

Why not compare directly to the value of inData?:

Data <= (others=>'0') when inClear='1' else
        inData when (inData/="0000") else                 
        Data;
outStatus <= Data;

Note: I've made an assumption as to what your inClear is doing. You can change that to do whatever you want.

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