Intel FGPA ModelSim Error: Invalid time string

Question

I have been working on my desktop using Quartus prime lite and ModelSim, but recently I got a weird error that I can't seem to fix. I have tried restarting my pc, uninstalling and reinstalling Quartus and ModelSim. Has anyone faced the same issue before? The weirdest part is that using the same sv files and .do sim script on my laptop runs the simulation successfully. I have attached what I think are the relevant files, but those should be fine since they work on my laptop.

I think this issue started when I was trying to transfer files between my laptop and desktop through a github repo.

Reading C:/intelFPGA_lite/17.0/modelsim_ase/tcl/vsim/pref.tcl
do runlab.do
# ** Warning: (vlib-34) Library already exists at "work".
# Model Technology ModelSim - Intel FPGA Edition vlog 10.5b Compiler 2016.10 Oct  5 2016
# Start time: 22:33:47 on Apr 12,2025
# vlog -reportprogress 300 ./mux2_1.sv 
# -- Compiling module mux2_1
# 
# Top level modules:
#   mux2_1
# End time: 22:33:47 on Apr 12,2025, Elapsed time: 0:00:00
# Errors: 0, Warnings: 0
# Model Technology ModelSim - Intel FPGA Edition vlog 10.5b Compiler 2016.10 Oct  5 2016
# Start time: 22:33:47 on Apr 12,2025
# vlog -reportprogress 300 ./mux2_1_tb.sv 
# -- Compiling module mux2_1_tb
# 
# Top level modules:
#   mux2_1_tb
# End time: 22:33:47 on Apr 12,2025, Elapsed time: 0:00:00
# Errors: 0, Warnings: 0
# vsim -voptargs=""+acc"" -t 1ps -lib work mux2_1_tb 
# Start time: 22:33:47 on Apr 12,2025
# Loading sv_std.std
# Loading work.mux2_1_tb
# Loading work.mux2_1
# Invalid time string specified:

// Implementation of a 2:1 multiplexor
// The output will match the corresponding input (i0 or i1) based on
// the value of the selector bit (sel).
module mux2_1 (
  output logic out
  ,input  logic i0, i1, sel
  );

  assign out = (i1 & sel) | (i0 & ~sel);
endmodule  // mux2_1

// Testbench for the mux2_1 module
// Runs through all 8 combinations of inputs, changing every 10 time units.
module mux2_1_tb();
  logic out;
  logic i0, i1, sel;

  // instantiate device under test (dut)
  mux2_1 dut (.out, .i0, .i1, .sel);

  // test input sequence
  initial begin
    sel=0; i0=0; i1=0; #10;
    sel=0; i0=0; i1=1; #10;
    sel=0; i0=1; i1=0; #10;
    sel=0; i0=1; i1=1; #10;
    sel=1; i0=0; i1=0; #10;
    sel=1; i0=0; i1=1; #10;
    sel=1; i0=1; i1=0; #10;
    sel=1; i0=1; i1=1; #10;
    $stop;  // needed to pause the simulation without closing it
  end
endmodule  // mux2_1_tb

Sim script:

# Create work library
vlib work

# Compile Verilog
#     All Verilog files that are part of this design should have
#     their own "vlog" line below.
vlog "./mux2_1.sv"
vlog "./mux2_1_tb.sv"

# Call vsim to invoke simulator
#     Make sure the last item on the line is the name of the
#     testbench module you want to execute.
vsim -voptargs="+acc" -t 1ps -lib work mux2_1_tb

# Source the wave do file
#     This should be the file that sets up the signal window for
#     the module you are testing.
do mux2_1_wave.do

# Set the window types
view wave
view structure
view signals

# Run the simulation
run -all

# End

@Mikef That did not work unfortunately. Do you know of a way to reset all model sim related system environments/variables back to default? — youlexa
– youlexa, Commented Apr 14 at 5:19
Please clarify your specific problem or provide additional details to highlight exactly what you need. As it's currently written, it's hard to tell exactly what you're asking. — Community
– Community Bot, Commented Apr 18 at 12:18

youlexa · Accepted Answer · 2025-05-01 06:47:48Z

I have found a solution that worked for me. It was provided by an Intel Community Employee and involves deleting system registry keys.

***Please make a backup by Export to .reg file, before deleting. As making incorrect changes to the Registry may cause issues to Windows and may cause programs crashing or no longer start***

Press "Windows+R" to open the run window, enter 'regedit', find the path HKEY_CURRENT_USERS\Software\ModelTechnology Incorpporated\Modelsim, and delete all the folders.

I also uninstalled quartus and modelsim before I ran this process then restarted my computer then reinstalled quartus and modelsim.
I don't know if the uninstalling and reinstalling was necessary but after that I no longer got the invalid time string issue.

As expected, it was not a code related issue or even a Quartus/modelsim version issue as I tried upgrading to the most recent quartus and using questa rather than modelsim but I still ran into the same error.

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