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In the idiom: while (exp == V.loadRelaxed()) { // allows the early issuing of any n-loads that'd fit within the speculative window. if (V.weakRMWRelease(exp, set)) return true; // ^^ (upward ...
Delark's user avatar
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I’m trying to understand how speculative execution interacts with weak memory models (ARM/Power) in the context of a spinlock implemented with a plain CAS. Example: // Spinlock acquisition attempt if (...
Delark's user avatar
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If a core supports simultaneous multithreading (SMT) and executes multiple logical threads, how does the Reorder Buffer (ROB) differentiate which instruction belongs to which logical thread? ...
Kislay Arya's user avatar
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134 views

I found this term in https://rcs.uwaterloo.ca/~ali/cs854-f23/papers/topdown.pdf For example, incorrect data speculation generated Memory Ordering Nukes [7] - a subset of Machine Clears. What is it ...
k1r1t0's user avatar
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Recently came across the SERIALIZE instruction. Serializes instruction execution. Before the next instruction is fetched and executed, the SERIALIZE instruction ensures that all modifications to ...
vengy's user avatar
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3 votes
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252 views

Consider below loop (https://godbolt.org/z/z4Wz1aanK) that has no loop-carried dependence. Will modern CPU speculatively execute next iteration with previous one? if true, is loop expansion still ...
Changbin Du's user avatar
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1 answer
583 views

I'd like to measure the number of instructions executed in my program including speculative instructions that didn't retire. I know that linux perf can easily report the retired instruction count with:...
Simple.guy's user avatar
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1 answer
539 views

I know that modern CPUs do OoO execution and got advanced branch predictors that may fail, how does the debugger deal with that? So, if the cpu fails in predicting a branch how does the debugger know ...
Ahmed Ehab's user avatar
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1 answer
230 views

There are [[likely]] and [[unlikely]] attributes in modern C++. There are corresponding __builtin_expect(x, 1) and __builtin_expect(x, 0) builtins in G++ and clang++. But also there are ...
Tomilov Anatoliy's user avatar
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35 views

Can speculative execution cause an Extended Page Table (EPT) violation on x86 processors? Assume I want to access a structure that has different Guest Physical Address (GPA) to Host Physical Address (...
CRoemheld's user avatar
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171 views

After reading about Spectre & Meltdown vulnerabilities, I learned about speculative execution. Given the following simple C++ program: #include <stdlib.h> void mallocBranch(int i) { if (...
cs questions's user avatar
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157 views

I have enabled speculative property in my algorithm. With the property, when i executed the Job, Out of 10 times, 8 times the Job completed without any issue and it completed fast as well. But 2 times ...
user2523067's user avatar
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1 answer
631 views

Let's say I have a Spark 2.x application, which has speculation enabled (spark.speculation=true), which writes data to a specific location on HDFS. Now if the task (which writes data to HDFS) takes ...
pri's user avatar
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As I understand, when a CPU speculatively executes a piece of code, it "backs up" the register state before switching to the speculative branch, so that if the prediction turns out wrong (...
golosovsky's user avatar
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I'm now trying to implement pipeline CPU based on RV32I ISA. My CPU has renaming algorithm for data hazards and branches prediction for control hazards. This is my example code for renaming ...
Thiện Lê's user avatar
9 votes
1 answer
1k views

Is this correct that Hardware Lock Elision is disabled for all current CPUs due to Spectre mitigation, and any attempt to have a mutex using HLE intrinsics/instructions would result in usual mutex? ...
Alex Guteniev's user avatar
3 votes
0 answers
177 views

There is a new function Interlocked.SpeculationBarrier since .net framework 4.8. I have been curious and looking for more information about this but couldn't really find out why this is included or ...
Valderann's user avatar
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I'm coding a web app at present that uses an Implicit Grant flow for the browser to obtain an ID token that is attached to all subsequent requests to the backend api. On my backend, whenever a ...
Jason Masters's user avatar
3 votes
1 answer
752 views

Let's say I run a job in Spark with speculation = true. If a task (let's say T1) takes a long time, Spark would launch a copy of task T1, say, T2 on another executor, without killing off T1. Now, if ...
pri's user avatar
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6 votes
2 answers
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Alright, so I know that if a particular conditional branch has a condition that takes time to compute (memory access, for instance), the CPU assumes a condition result and speculatively executes along ...
C. Pinto's user avatar
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1 answer
102 views

Consider the classical reuse of a register after an expensive computation, in pseudo assembly: r2 = cos(r1) *(r3) = r2 r2 = r5 + r6 *(r4) = r2 To be able to use the arithmetic units fully, the ...
curiousguy's user avatar
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I have a hypothesis that speculative execution on Intel Nehalem (1 gen) causing a crash. Is it possible or I completely wrong? If this is possible what can I do to prevent this? Maybe disable ...
Anton Dyachenko's user avatar
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120 views

I am examining ARM-Cortex A8 flow prediction abilities, in order to done this i implemented below code: char SecretDispatcher[256 * 512]; int counter = 0; //evicting SecretDispatcher from cache ... ...
alireza sadeghpour's user avatar
4 votes
0 answers
118 views

My interpretation is that, on a TLB miss, the PMH walks the page table and performs stuffed loads into the load buffer; if it encounters accessed or dirty bits that need to be set it communicates an ...
Lewis Kelsey's user avatar
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7 votes
1 answer
670 views

CVE-2018-12126 has been assigned to MSBDS (Microarchitectural StoreBuffer Data Sampling), a vulnerability of Intel's processors belonging to the newly created MDS (Microarchitectural Data Sampling) ...
Margaret Bloom's user avatar
16 votes
1 answer
2k views

The Memory Order Machine Clear performance event is described by the vTune documentation as: The memory ordering (MO) machine clear happens when a snoop request from another processor matches a ...
Margaret Bloom's user avatar
4 votes
1 answer
175 views

I'm trying to create a specpoline (cfr. Henry Wong) on my Kabe lake 7600U, I'm running CentOS 7. The full testing repository is available on GitHub. My version of the specpoline is as follow (cfr. ...
Margaret Bloom's user avatar
15 votes
1 answer
4k views

I'm trying to understand in detail what happens to instructions in the various stages of the skylake CPU pipeline when a branch is mis-predicted, and how quickly instructions from the correct branch ...
Steve Linton's user avatar
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1 answer
266 views

Considering these two methods: Dynamic Bimodal: Where we have 4 stages, 2 stages for each (taken or not taken), and alternating every time the algorithm predicts wrong, changing from taken<->not ...
PlayHardGoPro's user avatar
10 votes
1 answer
2k views

CPU's use branch prediction to speed up code, but only if the first branch is actually taken. Why not simply take both branches? That is, assume both branches will be hit, cache both sides, and the ...
AbstractDissonance's user avatar
19 votes
2 answers
12k views

I have read the wikipedia page about out-of-order execution and speculative exectution. What I fail to understant though are the similarities and differences. It seems to me that speculative ...
Name's user avatar
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3 votes
2 answers
378 views

If one has a function pointer table, and the index is provided as a volatile variable, will the generated code be considered branchless, and this avoid speculative execution, or will the processor ...
jxh's user avatar
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212 views

I have set the following flags so that speculative execution gets triggered for my MR jobs. There is some bad hardware causing jobs to run very long (8-9 hours instead of regular 1.5 - 3 hours) and ...
krishnang's user avatar
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9 votes
3 answers
6k views

What are the key differences between recently discovered hardware vulnerabilities Meltdown and Spectre? I know that they both rely on speculative execution, but how does they differ from each other?
Dragonight's user avatar
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3 votes
1 answer
731 views

The questions stems from reading the Spectre attack paper. If I understand it correctly the attack stems from the possibility of CPU heuristics speculatively executing (the wrong) branch of code. ...
lukeg's user avatar
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11 votes
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I have a situation where some of the address space is sensitive in that you read it you crash as there is nobody there to respond to that address. pop {r3,pc} bx r0 0: e8bd8008 pop {r3, pc} ...
old_timer's user avatar
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I know Hadoop/Spark framework will detect failed or slow machines and execute the same tasks on different machine. How will (On what basis) framework identifies the slow running machines. Is there ...
Ram's user avatar
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6 votes
1 answer
1k views

Suppose I have pseudo C code like below: int x = 0; int y = 0; int __attribute__ ((noinline)) func1(void) { int prev = x; (1) x |= FLAG; (2) return prev; (3) } int main(void) { ...
yacc45's user avatar
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11 votes
1 answer
805 views

If I understand branching correctly (x86), the processor will sometimes speculatively take a code path and perform the instructions and 'cancel' the results of the wrong path. What if the operation in ...
user1043761's user avatar
7 votes
2 answers
751 views

I have a task which writes avro output in multiple directories organized by few fields of the input records. For example : Process records of countries across years and write in a directory ...
rakesh99's user avatar
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1 vote
1 answer
124 views

Now I try to dispatch codes dynamically, for example, SSE, AVX and so on. In a binary file, all codes which will be dispatched at the time of execution are bundled. I worry that undefined CPU ...
bksg2015's user avatar
5 votes
4 answers
16k views

I was searching about hadoop and mapreduce with respect to straggler problems and the papers in this problem but yesterday I found that there is hadoop 2 with Yarn ,, unfortunately no paper is talking ...
Flowra's user avatar
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2 votes
1 answer
64 views

Since Mathematica 7.0, there is ParallelTry function [1] that evaluates multiple functions in parallel, returning the first result received. This is similar to parallelizing a search on a disjoint ...
shams's user avatar
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14 votes
1 answer
1k views

Going trough chapter 3 of this book called Computer Systems Architecture: A programmer's perspective, it is stated that an implementation like testl %eax, %eax cmovne (%eax), %edx is invalid because ...
Alex C's user avatar
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-1 votes
2 answers
313 views

I am working on Hadoop for my master thesis, Hadoop 1.1.2. I am studying a new algorithm for speculative task and so in this first step i m trying to apply some changes in the code. Sadly, also ...
user3682798's user avatar
2 votes
2 answers
2k views

After reading Hadoop speculative task execution I am trying to turn off speculative execution using the new Java api, but it has no effect. This is my Main class: public class Main { public ...
Gavriel's user avatar
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12 votes
3 answers
1k views

In the following pseudo-code: if (rdtscp supported by hardware) { Invoke "rdtscp" instruction } else { Invoke "rdtsc" instruction } Let's say the CPU does not support the rdtscp instruction ...
mtoossi's user avatar
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1 vote
2 answers
2k views

I have a reducer that needs to output results to different directories so that we can later use the output as input to Hive as a partitioned table. (Hive creates partitions based on folder name). In ...
Eddified's user avatar
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2 votes
1 answer
485 views

I have some javascript code in the HEAD that sets a cookie. Later at the bottom of the page I load another javascript file. This file is served by a dynamic back-end page that uses the cookie to ...
BarelyFitz's user avatar
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23 votes
3 answers
17k views

In computer architecture, what is difference between (branch) prediction and speculation?? These seems very similar, but i think there is a subtle distinction between them.
enc's user avatar
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