| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| * | [GlobalISel] Change representation of shuffle masks in MachineOperand. | Eli Friedman | 2020-01-13 | 1 | -6/+6 |
| * | [MIR] Fix cyclic dependency of MIR formatter | Peng Guo | 2020-01-10 | 1 | -8/+8 |
| * | Revert "Revert "[MIR] Target specific MIR formating and parsing"" | Daniel Sanders | 2020-01-08 | 1 | -32/+25 |
| * | Revert "[MIR] Target specific MIR formating and parsing" | Nico Weber | 2020-01-08 | 1 | -25/+32 |
| * | [MIR] Target specific MIR formating and parsing | Peng Guo | 2020-01-08 | 1 | -32/+25 |
| * | Revert "[MIR] Target specific MIR formating and parsing" | Daniel Sanders | 2020-01-08 | 1 | -25/+32 |
| * | [MIR] Target specific MIR formating and parsing | Peng Guo | 2020-01-08 | 1 | -32/+25 |
| * | [Alignment][NFC] Finish transition for `Loads` | Guillaume Chatelet | 2019-10-21 | 1 | -1/+2 |
| * | [CodeGen] Remove unused MachineMemOperand::print wrappers (PR41772) | Simon Pilgrim | 2019-10-02 | 1 | -11/+0 |
| * | MCRegisterInfo: Merge getLLVMRegNum and getLLVMRegNumFromEH | Pavel Labath | 2019-09-24 | 1 | -5/+3 |
| * | Apply llvm-prefer-register-over-unsigned from clang-tidy to LLVM | Daniel Sanders | 2019-08-15 | 1 | -1/+1 |
| * | GlobalISel: Change representation of shuffle masks | Matt Arsenault | 2019-08-13 | 1 | -0/+18 |
| * | CodeGen: Migration to using Register | Matt Arsenault | 2019-08-06 | 1 | -6/+6 |
| * | Finish moving TargetRegisterInfo::isVirtualRegister() and friends to llvm::Re... | Daniel Sanders | 2019-08-01 | 1 | -7/+7 |
| * | SelectionDAG, MI, AArch64: Widen target flags fields/arguments from unsigned ... | Peter Collingbourne | 2019-07-31 | 1 | -3/+3 |
| * | CodeGen: Introduce a class for registers | Matt Arsenault | 2019-06-24 | 1 | -1/+1 |
| * | Fix not calling TargetCustom PSVs printer | Matt Arsenault | 2019-06-14 | 1 | -1/+1 |
| * | [CodeGen] Fix hashing for MO_ExternalSymbol MachineOperands. | Eli Friedman | 2019-06-01 | 1 | -1/+1 |
| * | [MachineOperand] Add a ChangeToGA method | Nicolai Haehnle | 2019-05-15 | 1 | -0/+13 |
| * | Include what's used in a few cpp files - these were getting transitive | Eric Christopher | 2019-04-12 | 1 | -0/+1 |
| * | GlobalISel: Fix creating MMOs with align 0 | Matt Arsenault | 2019-01-31 | 1 | -1/+1 |
| * | Update the file headers across all of the LLVM projects in the monorepo | Chandler Carruth | 2019-01-19 | 1 | -4/+3 |
| * | [AArch64] - Return address signing dwarf support | Luke Cheeseman | 2018-12-18 | 1 | -0/+5 |
| * | Revert r347490 as it breaks address sanitizer builds | Luke Cheeseman | 2018-11-23 | 1 | -5/+0 |
| * | Revert r343341 | Luke Cheeseman | 2018-11-23 | 1 | -0/+5 |
| * | MachineOperand/MIParser: Do not print debug-use flag, infer it | Matthias Braun | 2018-10-30 | 1 | -2/+2 |
| * | Fix in MachineOperand::printIRValueReference(). | Jonas Paulsson | 2018-10-25 | 1 | -1/+2 |
| * | Revert r343317 | Luke Cheeseman | 2018-09-28 | 1 | -5/+0 |
| * | Reapply changes reverted by r343235 | Luke Cheeseman | 2018-09-28 | 1 | -0/+5 |
| * | Revert r343192 as an ubsan build is currently failing | Luke Cheeseman | 2018-09-27 | 1 | -5/+0 |
| * | Reapply changes reverted in r343114, lldb patch to follow shortly | Luke Cheeseman | 2018-09-27 | 1 | -0/+5 |
| * | Revert r343112 as CallFrameString API change has broken lldb builds | Luke Cheeseman | 2018-09-26 | 1 | -5/+0 |
| * | [AArch64] - Return address signing dwarf support | Luke Cheeseman | 2018-09-26 | 1 | -0/+5 |
| * | Revert r343089 "[AArch64] - Return address signing dwarf support" | Hans Wennborg | 2018-09-26 | 1 | -5/+0 |
| * | [AArch64] - Return address signing dwarf support | Luke Cheeseman | 2018-09-26 | 1 | -0/+5 |
| * | Consistently use MemoryLocation::UnknownSize to indicate unknown access size | Krzysztof Parzyszek | 2018-08-20 | 1 | -1/+6 |
| * | [ADT] Make escaping fn conform to coding guidelines | Jonas Devlieghere | 2018-05-31 | 1 | -1/+1 |
| * | [MachineVerifier][GlobalISel] NFC, Improving MO printing and refactoring visi... | Roman Tereshin | 2018-05-07 | 1 | -1/+7 |
| * | IWYU for llvm-config.h in llvm, additions. | Nico Weber | 2018-04-30 | 1 | -0/+1 |
| * | Fix type mismatch between MachineMemOperand constructor and accessors. NFC | Daniel Sanders | 2018-04-09 | 1 | -1/+1 |
| * | [MIR] Adding support for Named Virtual Registers in MIR. | Puyan Lotfi | 2018-03-30 | 1 | -1/+9 |
| * | [CodeGen] Fixed unreachable with -print-machineinstrs and custom pseudo sourc... | Tim Renouf | 2018-03-27 | 1 | -1/+6 |
| * | [CodeGen] Use MIR syntax for MachineMemOperand printing | Francis Visoiu Mistrih | 2018-03-14 | 1 | -103/+168 |
| * | [MachineOperand][Target] MachineOperand::isRenamable semantics changes | Geoff Berry | 2018-02-23 | 1 | -15/+15 |
| * | [CodeGen][NFC] Rename IsVerbose to IsStandalone in Machine*::print | Francis Visoiu Mistrih | 2018-01-18 | 1 | -3/+3 |
| * | [CodeGen] Print RegClasses on MI in verbose mode | Francis Visoiu Mistrih | 2018-01-18 | 1 | -3/+3 |
| * | [CodeGen][NFC] Correct case for printSubRegIdx | Francis Visoiu Mistrih | 2018-01-16 | 1 | -1/+1 |
| * | [MIR] Repurposing '$' sigil used by external symbols. Replacing with '&'. | Puyan Lotfi | 2018-01-10 | 1 | -1/+1 |
| * | [CodeGen] Move printing MO_BlockAddress operands to MachineOperand::print | Francis Visoiu Mistrih | 2017-12-19 | 1 | -6/+39 |
| * | [CodeGen] Move printing MO_IntrinsicID operands to MachineOperand::print | Francis Visoiu Mistrih | 2017-12-19 | 1 | -2/+2 |
