| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| * | [MachineScheduler] Reduce reordering due to mem op clustering | Jay Foad | 2020-01-14 | 1 | -0/+2 |
| * | [NFC] Refactor memory ops cluster method | Qiu Chaofan | 2020-01-12 | 1 | -14/+7 |
| * | [NFC] Move InPQueue into arguments of releaseNode | Qiu Chaofan | 2020-01-08 | 1 | -8/+3 |
| * | [NFC] Add explicit instantiation to releaseNode | Qiu Chaofan | 2020-01-02 | 1 | -0/+5 |
| * | [MachineScheduler] improve reuse of 'releaseNode'method | Lorenzo Casalino | 2020-01-01 | 1 | -17/+21 |
| * | [AArch64] Enable clustering memory accesses to fixed stack objects | Jay Foad | 2019-12-18 | 1 | -1/+1 |
| * | Sink all InitializePasses.h includes | Reid Kleckner | 2019-11-13 | 1 | -0/+1 |
| * | [MachineScheduler] Enable AA in PostRA Machine scheduler | David Green | 2019-11-05 | 1 | -0/+2 |
| * | [Scheduling][ARM] Consistently enable PostRA Machine scheduling | David Green | 2019-11-05 | 1 | -1/+1 |
| * | [Dominators][CodeGen] Fix MachineDominatorTree preservation in PHIElimination | Jakub Kuderski | 2019-10-01 | 1 | -2/+3 |
| * | [AMDGPU] Add VerifyScheduling support. | Jay Foad | 2019-10-01 | 1 | -3/+4 |
| * | [ScheduleDAGMILive] Fix typo in comment. | Mingjie Xing | 2019-09-14 | 1 | -1/+1 |
| * | Apply llvm-prefer-register-over-unsigned from clang-tidy to LLVM | Daniel Sanders | 2019-08-15 | 1 | -3/+3 |
| * | [llvm] Migrate llvm::make_unique to std::make_unique | Jonas Devlieghere | 2019-08-15 | 1 | -8/+8 |
| * | Finish moving TargetRegisterInfo::isVirtualRegister() and friends to llvm::Re... | Daniel Sanders | 2019-08-01 | 1 | -12/+11 |
| * | [MachineScheduler] checkResourceLimit boundary condition update | Jinsong Ji | 2019-06-07 | 1 | -5/+11 |
| * | MISched: Fix -misched-regpressure=0 if subreg liveness enabled | Matt Arsenault | 2019-05-30 | 1 | -1/+3 |
| * | Adjust MachineScheduler to use ProcResource counts | Momchil Velikov | 2019-05-10 | 1 | -17/+55 |
| * | [CodeGen] Add "const" to MachineInstr::mayAlias | Bjorn Pettersson | 2019-04-19 | 1 | -3/+3 |
| * | [PATCH] [MachineScheduler] Check pending instructions when an instruction is ... | James Molloy | 2019-04-19 | 1 | -0/+2 |
| * | [ScheduleDAG] Move `Topo` and `addEdge` to base class. | Clement Courbet | 2019-03-29 | 1 | -26/+3 |
| * | MISched: Don't schedule regions with 0 instructions | Matt Arsenault | 2019-03-25 | 1 | -2/+6 |
| * | Update the file headers across all of the LLVM projects in the monorepo | Chandler Carruth | 2019-01-19 | 1 | -4/+3 |
| * | [NFC] fix trivial typos in comments | Hiroshi Inoue | 2019-01-09 | 1 | -2/+2 |
| * | [MachineScheduler] Order FI-based memops based on stack direction | Francis Visoiu Mistrih | 2018-11-29 | 1 | -4/+18 |
| * | [MachineScheduler] Add support for clustering mem ops with FI base operands | Francis Visoiu Mistrih | 2018-11-28 | 1 | -2/+14 |
| * | [CodeGen][NFC] Make `TII::getMemOpBaseImmOfs` return a base operand | Francis Visoiu Mistrih | 2018-11-28 | 1 | -11/+11 |
| * | Bias physical register immediate assignments | Nirav Dave | 2018-11-14 | 1 | -25/+42 |
| * | Type safe version of MachinePassRegistry | Serge Guelton | 2018-11-09 | 1 | -1/+2 |
| * | llvm::sort(C.begin(), C.end(), ...) -> llvm::sort(C, ...) | Fangrui Song | 2018-09-27 | 1 | -1/+1 |
| * | MachineScheduler: Add -misched-print-dags flag | Matthias Braun | 2018-09-19 | 1 | -1/+6 |
| * | ScheduleDAG: Cleanup dumping code; NFC | Matthias Braun | 2018-09-19 | 1 | -24/+29 |
| * | MachineScheduler: Refactor setPolicy() to limit computing remaining latency | Tom Stellard | 2018-08-21 | 1 | -28/+60 |
| * | [NFC] fix trivial typos in comments | Hiroshi Inoue | 2018-06-20 | 1 | -5/+5 |
| * | Rename DEBUG macro to LLVM_DEBUG. | Nicola Zaghen | 2018-05-14 | 1 | -187/+175 |
| * | [DebugInfo] Examine all uses of isDebugValue() for debug instructions. | Shiva Chen | 2018-05-09 | 1 | -4/+4 |
| * | Remove \brief commands from doxygen comments. | Adrian Prantl | 2018-05-01 | 1 | -8/+8 |
| * | IWYU for llvm-config.h in llvm, additions. | Nico Weber | 2018-04-30 | 1 | -0/+1 |
| * | [MachineScheduler] NFC refactoring | Jonas Paulsson | 2018-04-12 | 1 | -21/+25 |
| * | [CodeGen] Change std::sort to llvm::sort in response to r327219 | Mandeep Singh Grang | 2018-04-06 | 1 | -1/+1 |
| * | Fix layering of MachineValueType.h by moving it from CodeGen to Support | David Blaikie | 2018-03-23 | 1 | -1/+1 |
| * | [MachineScheduler] Dump SUnits before calling SchedImpl->initialize() | Jonas Paulsson | 2018-03-05 | 1 | -4/+4 |
| * | Revert "[CodeGen] Move printing '\n' from MachineInstr::print to MachineBasic... | Francis Visoiu Mistrih | 2018-02-19 | 1 | -11/+6 |
| * | [CodeGen] Move printing '\n' from MachineInstr::print to MachineBasicBlock::p... | Francis Visoiu Mistrih | 2018-02-08 | 1 | -6/+11 |
| * | CodeGen: Fix assertion in ScheduleDAGMILive::scheduleMI due to llvm.dbg.value | Yaxun Liu | 2018-01-23 | 1 | -0/+1 |
| * | MachineFunction: Return reference from getFunction(); NFC | Matthias Braun | 2017-12-15 | 1 | -2/+2 |
| * | Recommit CodeGen: Fix assertion in machine inst sheduler due to llvm.dbg.value | Yaxun Liu | 2017-12-15 | 1 | -2/+6 |
| * | Revert CodeGen: Fix assertion in machine inst sheduler due to llvm.dbg.value | Yaxun Liu | 2017-12-14 | 1 | -6/+2 |
| * | CodeGen: Fix assertion in machine inst sheduler due to llvm.dbg.value | Yaxun Liu | 2017-12-13 | 1 | -2/+6 |
| * | Rename LiveIntervalAnalysis.h to LiveIntervals.h | Matthias Braun | 2017-12-13 | 1 | -1/+1 |
