| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| * | Apply llvm-prefer-register-over-unsigned from clang-tidy to LLVM | Daniel Sanders | 2019-08-15 | 1 | -1/+1 |
| * | Update the file headers across all of the LLVM projects in the monorepo | Chandler Carruth | 2019-01-19 | 1 | -4/+3 |
| * | [CodeGen] assume max/default throughput for unspecified instructions | Sanjay Patel | 2018-06-05 | 1 | -5/+7 |
| * | [MCSchedule] Add the ability to compute the latency and throughput informatio... | Andrea Di Biagio | 2018-05-31 | 1 | -1/+15 |
| * | [MC] Moved all the remaining logic that computed instruction latency and reci... | Andrea Di Biagio | 2018-04-15 | 1 | -35/+10 |
| * | [TargetSchedule] shrink interface for init(); NFCI | Sanjay Patel | 2018-04-08 | 1 | -6/+4 |
| * | [MC] Move the reciprocal throughput computation from TargetSchedModel to MCSc... | Andrea Di Biagio | 2018-03-13 | 1 | -29/+4 |
| * | [MC] Move the instruction latency computation from TargetSchedModel to MCSche... | Andrea Di Biagio | 2018-03-13 | 1 | -9/+1 |
| * | [TargetSchedule] Minor refactor in computeInstrLatency. NFC | Andrea Di Biagio | 2018-03-11 | 1 | -6/+4 |
| * | Fix a bunch more layering of CodeGen headers that are in Target | David Blaikie | 2017-11-17 | 1 | -2/+2 |
| * | Target/TargetInstrInfo.h -> CodeGen/TargetInstrInfo.h to match layering | David Blaikie | 2017-11-08 | 1 | -1/+1 |
| * | CodeGen: Minor cleanups to use MachineInstr::getMF. NFC | Justin Bogner | 2017-10-10 | 1 | -1/+1 |
| * | This patch returns proper value to indicate the case when instruction through... | Andrew V. Tischenko | 2017-07-26 | 1 | -20/+24 |
| * | Fix spelling mistake in getRThroughput static function names. NFCI. | Simon Pilgrim | 2017-06-06 | 1 | -11/+11 |
| * | Sort the remaining #include lines in include/... and lib/.... | Chandler Carruth | 2017-06-06 | 1 | -1/+1 |
| * | This patch closes PR#32216: Better testing of schedule model instruction late... | Andrew V. Tischenko | 2017-04-14 | 1 | -1/+70 |
| * | Improve machine schedulers for in-order processors | Javed Absar | 2017-03-27 | 1 | -0/+23 |
| * | [CodeGen] Fix some Clang-tidy modernize and Include What You Use warnings; ot... | Eugene Zelenko | 2017-02-27 | 1 | -3/+13 |
| * | TargetSchedule: Do not consider subregister definitions as reads. | Matthias Braun | 2016-08-24 | 1 | -1/+1 |
| * | CodeGen: Use MachineInstr& in TargetInstrInfo, NFC | Duncan P. N. Exon Smith | 2016-06-30 | 1 | -10/+10 |
| * | [TargetSchedule] Use 'isOutOfOrder' as possible to avoid magic number. NFC. | Junmo Park | 2016-06-21 | 1 | -3/+2 |
| * | CodeGen: TII: Take MachineInstr& in predicate API, NFC | Duncan P. N. Exon Smith | 2016-02-23 | 1 | -1/+1 |
| * | [MISched] Explanatory error message when machine model is not complete. NFC | MinSeong Kim | 2016-01-05 | 1 | -1/+1 |
| * | Use llvm_unreachable() instead of report_fatal_error() if the machine model i... | Matthias Braun | 2015-07-17 | 1 | -5/+3 |
| * | Turn effective assert(0) into llvm_unreachable | Matthias Braun | 2015-05-14 | 1 | -3/+1 |
| * | TargetSchedule: factor out common code; NFC | Matthias Braun | 2015-05-14 | 1 | -21/+17 |
| * | Remove unnecessary TargetMachine.h includes. | Eric Christopher | 2014-10-14 | 1 | -1/+0 |
| * | Change MCSchedModel to be a struct of statically initialized data. | Pete Cooper | 2014-09-02 | 1 | -4/+4 |
| * | Have MachineFunction cache a pointer to the subtarget to make lookups | Eric Christopher | 2014-08-05 | 1 | -2/+1 |
| * | Remove the TargetMachine forwards for TargetSubtargetInfo based | Eric Christopher | 2014-08-04 | 1 | -1/+2 |
| * | MachineCombiner Pass for selecting faster instruction | Gerolf Hoflehner | 2014-08-03 | 1 | -0/+22 |
| * | Revert "Introduce a string_ostream string builder facilty" | Alp Toker | 2014-06-26 | 1 | -4/+5 |
| * | Introduce a string_ostream string builder facilty | Alp Toker | 2014-06-26 | 1 | -5/+4 |
| * | IfConverter: Use TargetSchedule for instruction latencies | Arnold Schwaighofer | 2013-09-30 | 1 | -2/+5 |
| * | Mark the x86 machine model as incomplete. PR17367. | Andrew Trick | 2013-09-25 | 1 | -1/+2 |
| * | MI-Sched: handle ReadAdvance latencies as used by Swift. | Andrew Trick | 2013-06-17 | 1 | -1/+4 |
| * | Machine Model: Add MicroOpBufferSize and resource BufferSize. | Andrew Trick | 2013-06-15 | 1 | -44/+14 |
| * | MI-Sched cleanup. If an instruction has no valid sched class, do not attempt ... | Andrew Trick | 2013-04-13 | 1 | -0/+2 |
| * | Change the default latency for implicit defs. | Andrew Trick | 2013-03-16 | 1 | -1/+4 |
| * | Use the new script to sort the includes of every file under lib. | Chandler Carruth | 2012-12-03 | 1 | -2/+2 |
| * | misched: TargetSchedule interface for machine resources. | Andrew Trick | 2012-11-06 | 1 | -4/+35 |
| * | misched: Better handling of invalid latencies in the machine model | Andrew Trick | 2012-10-17 | 1 | -2/+10 |
| * | misched: Handle "transient" non-instructions. | Andrew Trick | 2012-10-11 | 1 | -17/+23 |
| * | misched: fall-back to a target hook for instr bundles. | Andrew Trick | 2012-10-10 | 1 | -3/+4 |
| * | misched: Use the TargetSchedModel interface wherever possible. | Andrew Trick | 2012-10-10 | 1 | -0/+49 |
| * | misched: Add computeInstrLatency to TargetSchedModel. | Andrew Trick | 2012-10-09 | 1 | -0/+24 |
| * | misched: Allow flags to disable hasInstrSchedModel/hasInstrItineraries for ex... | Andrew Trick | 2012-10-09 | 1 | -6/+12 |
| * | Enable -schedmodel, but prefer itineraries until we have more benchmark data. | Andrew Trick | 2012-10-04 | 1 | -52/+51 |
| * | TargetSchedule: cleanup computeOperandLatency logic & diagnostics. | Andrew Trick | 2012-09-18 | 1 | -6/+16 |
| * | TargetSchedModel API. Implement latency lookup, disabled. | Andrew Trick | 2012-09-18 | 1 | -0/+140 |
