| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| * | Revert "[AMDGPU] Invert the handling of skip insertion." | Nicolai Hähnle | 2020-02-03 | 1 | -5/+5 |
| * | [AMDGPU] Invert the handling of skip insertion. | cdevadas | 2020-01-15 | 1 | -5/+5 |
| * | [AMDGPU] Fix emitIfBreak CF lowering: use temp reg to make register coalescer... | vpykhtin | 2019-11-26 | 1 | -2/+5 |
| * | [AMDGPU]: PHI Elimination hooks added for custom COPY insertion. Fixed | Alexander Timofeev | 2019-09-17 | 1 | -15/+34 |
| * | Revert for: [AMDGPU]: PHI Elimination hooks added for custom COPY insertion. | Alexander Timofeev | 2019-09-13 | 1 | -9/+5 |
| * | [AMDGPU]: PHI Elimination hooks added for custom COPY insertion. | Alexander Timofeev | 2019-09-10 | 1 | -5/+9 |
| * | Revert "AMDGPU: Fix iterator error when lowering SI_END_CF" | Matt Arsenault | 2019-08-20 | 1 | -121/+21 |
| * | AMDGPU: Fix iterator error when lowering SI_END_CF | Matt Arsenault | 2019-08-18 | 1 | -4/+4 |
| * | Apply llvm-prefer-register-over-unsigned from clang-tidy to LLVM | Daniel Sanders | 2019-08-15 | 1 | -3/+3 |
| * | Finish moving TargetRegisterInfo::isVirtualRegister() and friends to llvm::Re... | Daniel Sanders | 2019-08-01 | 1 | -3/+2 |
| * | Reapply "AMDGPU: Split block for si_end_cf" | Matt Arsenault | 2019-08-01 | 1 | -18/+118 |
| * | CodeGen: Introduce a class for registers | Matt Arsenault | 2019-06-24 | 1 | -5/+5 |
| * | [AMDGPU] gfx10 conditional registers handling | Stanislav Mekhanoshin | 2019-06-16 | 1 | -24/+57 |
| * | Revert "AMDGPU: Split block for si_end_cf" | Mark Searles | 2019-04-27 | 1 | -112/+15 |
| * | AMDGPU: Split block for si_end_cf | Matt Arsenault | 2019-04-03 | 1 | -15/+112 |
| * | AMDGPU: Preserve undef flag when expanding SI_IF | Matt Arsenault | 2019-03-05 | 1 | -2/+2 |
| * | AMDGPU: Use removeAllRegUnitsForPhysReg | Matt Arsenault | 2019-02-22 | 1 | -2/+2 |
| * | Update the file headers across all of the LLVM projects in the monorepo | Chandler Carruth | 2019-01-19 | 1 | -4/+3 |
| * | AMDGPU: Remove PHI loop condition optimization | Nicolai Haehnle | 2018-10-31 | 1 | -29/+0 |
| * | AMDGPU: Refactor Subtarget classes | Tom Stellard | 2018-07-11 | 1 | -1/+1 |
| * | [AMDGPU] prevent hitting Assertion `isReg() && "Wrong MachineOperand accessor"' | Mark Searles | 2018-06-12 | 1 | -2/+2 |
| * | [AMDGPU] Fixed incorrect break from loop | Tim Renouf | 2018-05-25 | 1 | -2/+40 |
| * | AMDGPU: Remove #include "MCTargetDesc/AMDGPUMCTargetDesc.h" from common headers | Tom Stellard | 2018-05-22 | 1 | -0/+1 |
| * | Remove \brief commands from doxygen comments. | Adrian Prantl | 2018-05-01 | 1 | -1/+1 |
| * | Rename LiveIntervalAnalysis.h to LiveIntervals.h | Matthias Braun | 2017-12-13 | 1 | -1/+1 |
| * | [CodeGen] Print register names in lowercase in both MIR and debug output | Francis Visoiu Mistrih | 2017-11-28 | 1 | -13/+13 |
| * | Fix a bunch more layering of CodeGen headers that are in Target | David Blaikie | 2017-11-17 | 1 | -1/+1 |
| * | AMDGPU: Add new intrinsic llvm.amdgcn.kill(i1) | Marek Olsak | 2017-10-24 | 1 | -4/+5 |
| * | [AMDGPU] Preserve inverted bit in SI_IF in presence of SI_KILL | Stanislav Mekhanoshin | 2017-08-04 | 1 | -5/+33 |
| * | [AMDGPU] Optimize SI_IF lowering for simple if regions | Stanislav Mekhanoshin | 2017-07-26 | 1 | -8/+23 |
| * | Sort the remaining #include lines in include/... and lib/.... | Chandler Carruth | 2017-06-06 | 1 | -1/+1 |
| * | [AMDGPU] Fix some Clang-tidy modernize and Include What You Use warnings; oth... | Eugene Zelenko | 2017-01-20 | 1 | -14/+19 |
| * | [AMDGPU] Add exec copy to LiveIntervals in SILowerControlFlow::emitElse | Stanislav Mekhanoshin | 2017-01-19 | 1 | -1/+3 |
| * | [CodeGen] Rename MachineInstrBuilder::addOperand. NFC | Diana Picus | 2017-01-13 | 1 | -16/+14 |
| * | [AMDGPU] Allow hoisting of comparisons out of a loop and eliminate condition ... | Stanislav Mekhanoshin | 2016-11-28 | 1 | -3/+75 |
| * | [AMDGPU] Fix multiple vreg definitions in si-lower-control-flow | Stanislav Mekhanoshin | 2016-11-22 | 1 | -7/+15 |
| * | Use StringRef in Pass/PassManager APIs (NFC) | Mehdi Amini | 2016-10-01 | 1 | -1/+1 |
| * | AMDGPU: Partially fix control flow at -O0 | Matt Arsenault | 2016-09-29 | 1 | -13/+61 |
| * | AMDGPU: Remove register operand from si_mask_branch | Matt Arsenault | 2016-08-27 | 1 | -4/+2 |
| * | AMDGPU: Split SILowerControlFlow into two pieces | Matt Arsenault | 2016-08-22 | 1 | -343/+169 |
| * | AMDGPU: Remove unused tracking of flat instructions | Matt Arsenault | 2016-08-11 | 1 | -15/+0 |
| * | AMDGPU: Change insertion point of si_mask_branch | Matt Arsenault | 2016-08-10 | 1 | -10/+17 |
| * | AMDGPU: add execfix flag to SI_ELSE | Nicolai Haehnle | 2016-07-28 | 1 | -8/+4 |
| * | Remove MCAsmInfo.h include from TargetOptions.h | Reid Kleckner | 2016-07-27 | 1 | -0/+1 |
| * | AMDGPU: Make AMDGPUMachineFunction fields private | Matt Arsenault | 2016-07-26 | 1 | -1/+1 |
| * | AMDGPU: Make skip threshold an option | Matt Arsenault | 2016-07-25 | 1 | -3/+8 |
| * | [AMDGPU] Remove spurious line (should've been removed in r276029). | Davide Italiano | 2016-07-19 | 1 | -3/+0 |
| * | [AMDGPU] Remove dead code. | Davide Italiano | 2016-07-19 | 1 | -25/+0 |
| * | AMDGPU: Expand register indexing pseudos in custom inserter | Matt Arsenault | 2016-07-19 | 1 | -286/+0 |
| * | AMDGPU: Fix not expanding control flow after some kill blocks | Matt Arsenault | 2016-07-15 | 1 | -7/+2 |
