| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| * | A15SDOptimizer::getPrefSPRLane - fix null dereference warning. NFCI | Simon Pilgrim | 2019-11-02 | 1 | -2/+1 |
| * | Apply llvm-prefer-register-over-unsigned from clang-tidy to LLVM | Daniel Sanders | 2019-08-15 | 1 | -16/+16 |
| * | Finish moving TargetRegisterInfo::isVirtualRegister() and friends to llvm::Re... | Daniel Sanders | 2019-08-01 | 1 | -11/+11 |
| * | Update the file headers across all of the LLVM projects in the monorepo | Chandler Carruth | 2019-01-19 | 1 | -4/+3 |
| * | [ARM] Add new feature to enable optimizing the VFP registers | Evandro Menezes | 2018-07-20 | 1 | -1/+2 |
| * | Rename DEBUG macro to LLVM_DEBUG. | Nicola Zaghen | 2018-05-14 | 1 | -10/+9 |
| * | MachineFunction: Return reference from getFunction(); NFC | Matthias Braun | 2017-12-15 | 1 | -1/+1 |
| * | [CodeGen] Rename functions PrintReg* to printReg* | Francis Visoiu Mistrih | 2017-11-28 | 1 | -2/+2 |
| * | Fix a bunch more layering of CodeGen headers that are in Target | David Blaikie | 2017-11-17 | 1 | -2/+2 |
| * | [ARM] Tidy-up Cortex-A15 DPR-SPR optimizer implementation | Javed Absar | 2017-08-14 | 1 | -27/+12 |
| * | [ARM] CodeGen: Remove AddDefaultPred. NFC. | Diana Picus | 2017-01-13 | 1 | -14/+10 |
| * | Use StringRef in Pass/PassManager APIs (NFC) | Mehdi Amini | 2016-10-01 | 1 | -3/+1 |
| * | ARM: Remove implicit iterator conversions, NFC | Duncan P. N. Exon Smith | 2016-07-08 | 1 | -1/+1 |
| * | Pass DebugLoc and SDLoc by const ref. | Benjamin Kramer | 2016-06-12 | 1 | -40/+29 |
| * | Add optimization bisect opt-in calls for ARM passes | Andrew Kaylor | 2016-04-25 | 1 | -0/+3 |
| * | Re-sort includes with sort-includes.py and insert raw_ostream.h where it's used. | Benjamin Kramer | 2015-03-23 | 1 | -0/+1 |
| * | Cleanup and remove a chunk of getARMSubtarget calls in the | Eric Christopher | 2015-03-05 | 1 | -2/+9 |
| * | Include map into the A15SDOptimizer rather than pick it up | Eric Christopher | 2014-10-14 | 1 | -0/+1 |
| * | Have MachineFunction cache a pointer to the subtarget to make lookups | Eric Christopher | 2014-08-05 | 1 | -3/+2 |
| * | Remove the TargetMachine forwards for TargetSubtargetInfo based | Eric Christopher | 2014-08-04 | 1 | -2/+4 |
| * | Convert some assert(0) to llvm_unreachable or fold an 'if' condition into the... | Craig Topper | 2014-06-19 | 1 | -2/+1 |
| * | [C++] Use 'nullptr'. Target edition. | Craig Topper | 2014-04-25 | 1 | -3/+3 |
| * | [Modules] Fix potential ODR violations by sinking the DEBUG_TYPE | Chandler Carruth | 2014-04-22 | 1 | -1/+2 |
| * | Tidy up. Trailing whitespace. | Jim Grosbach | 2014-04-03 | 1 | -4/+4 |
| * | Prune includes in ARM target. | Craig Topper | 2014-03-22 | 1 | -6/+1 |
| * | [ARM]Fix an assertion failure in A15SDOptimizer about DPair reg class by trea... | Hao Liu | 2014-03-20 | 1 | -3/+9 |
| * | Phase 2 of the great MachineRegisterInfo cleanup. This time, we're changing | Owen Anderson | 2014-03-13 | 1 | -4/+4 |
| * | [C++11] Add 'override' keyword to virtual methods that override their base cl... | Craig Topper | 2014-03-10 | 1 | -2/+2 |
| * | Re-sort all of the includes with ./utils/sort_includes.py so that | Chandler Carruth | 2014-01-07 | 1 | -3/+1 |
| * | Correct word hyphenations | Alp Toker | 2013-12-05 | 1 | -1/+1 |
| * | ARM: Teach A15 SDOptimizer to properly handle D-reg by-lane. | Jim Grosbach | 2013-09-04 | 1 | -0/+7 |
| * | Use SmallVectorImpl::iterator/const_iterator instead of SmallVector to avoid ... | Craig Topper | 2013-07-03 | 1 | -3/+3 |
| * | Adding an A15 specific optimization pass for interactions between S/D/Q regis... | Silviu Baranga | 2013-03-15 | 1 | -0/+704 |
