| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| * | Implementation of asm-goto support in LLVM | Craig Topper | 2019-02-08 | 1 | -0/+2 |
| * | Update the file headers across all of the LLVM projects in the monorepo | Chandler Carruth | 2019-01-19 | 1 | -4/+3 |
| * | Fix clang -Wimplicit-fallthrough warnings across llvm, NFC | Reid Kleckner | 2018-11-01 | 1 | -0/+1 |
| * | ScheduleDAG: Cleanup dumping code; NFC | Matthias Braun | 2018-09-19 | 1 | -4/+3 |
| * | Rename DEBUG macro to LLVM_DEBUG. | Nicola Zaghen | 2018-05-14 | 1 | -71/+73 |
| * | [HexagonMachineScheduler] Remove local (copied) getWeakLeft(). | Jonas Paulsson | 2018-04-12 | 1 | -4/+0 |
| * | [Hexagon] Add heuristic to exclude critical path cost for scheduling | Krzysztof Parzyszek | 2018-03-20 | 1 | -173/+75 |
| * | [Hexagon] Correct the computation of TopReadyCycle and BotReadyCycle of SU | Krzysztof Parzyszek | 2018-03-20 | 1 | -13/+5 |
| * | [Hexagon] Check weak dependences when only 1 instruction is available | Krzysztof Parzyszek | 2018-03-20 | 1 | -9/+13 |
| * | [Hexagon] Improve scheduling heuristic for large basic blocks | Krzysztof Parzyszek | 2018-03-20 | 1 | -3/+11 |
| * | [Hexagon] Fix division by zero in machine scheduler | Krzysztof Parzyszek | 2018-03-20 | 1 | -1/+1 |
| * | [Hexagon] Improve scheduling based on register pressure | Krzysztof Parzyszek | 2018-03-20 | 1 | -60/+203 |
| * | MachineFunction: Return reference from getFunction(); NFC | Matthias Braun | 2017-12-15 | 1 | -1/+1 |
| * | [CodeGen] Unify MBB reference format in both MIR and debug output | Francis Visoiu Mistrih | 2017-12-04 | 1 | -8/+6 |
| * | Fix a bunch more layering of CodeGen headers that are in Target | David Blaikie | 2017-11-17 | 1 | -3/+3 |
| * | Target/TargetInstrInfo.h -> CodeGen/TargetInstrInfo.h to match layering | David Blaikie | 2017-11-08 | 1 | -1/+1 |
| * | [Hexagon] Fix some Clang-tidy modernize and Include What You Use warnings; ot... | Eugene Zelenko | 2017-09-28 | 1 | -10/+31 |
| * | [Hexagon] Break up DAG mutations into separate classes, move to subtarget | Krzysztof Parzyszek | 2017-08-28 | 1 | -79/+0 |
| * | [Hexagon] Move pre-RA DAG mutations to scheduler constructor | Krzysztof Parzyszek | 2017-08-28 | 1 | -13/+1 |
| * | [CodeGen] Rename DEBUG_TYPE to match passnames | Evandro Menezes | 2017-07-11 | 1 | -1/+1 |
| * | [Hexagon] Speedup NumNodesBlocking calculation. NFCI. | Nirav Dave | 2017-06-08 | 1 | -32/+25 |
| * | [Hexagon] Use automatically-generated scheduling information for HVX | Krzysztof Parzyszek | 2017-05-03 | 1 | -1/+1 |
| * | [Hexagon] Update instruction types | Krzysztof Parzyszek | 2017-02-07 | 1 | -1/+3 |
| * | Move helpers into anonymous namespaces. NFC. | Benjamin Kramer | 2016-08-06 | 1 | -0/+2 |
| * | [Hexagon] Referencify MachineInstr in HexagonInstrInfo, NFC | Krzysztof Parzyszek | 2016-07-29 | 1 | -8/+8 |
| * | [Hexagon] Misc changes to HexagonMachineScheduler, NFC | Krzysztof Parzyszek | 2016-07-18 | 1 | -26/+3 |
| * | [Hexagon] Enable .cur formation in MISched for Hexagon V60 | Krzysztof Parzyszek | 2016-07-18 | 1 | -0/+8 |
| * | [Hexagon] Add verbose debugging mode to Hexagon MI Scheduler | Krzysztof Parzyszek | 2016-07-18 | 1 | -8/+71 |
| * | [Hexagon] Use timing class info as tie-breaker in machine scheduler | Krzysztof Parzyszek | 2016-07-18 | 1 | -0/+66 |
| * | [Hexagon] HexagonMachineScheduler should account for resources | Krzysztof Parzyszek | 2016-07-18 | 1 | -10/+78 |
| * | [Hexagon] Fix zero latency instructions with multiple predecessors | Krzysztof Parzyszek | 2016-07-18 | 1 | -2/+30 |
| * | [Hexagon] Handle instruction latency for 0 or 2 cycles | Krzysztof Parzyszek | 2016-07-15 | 1 | -0/+22 |
| * | [Hexagon] Make MI scheduler check for stalls in previous packet on v60 | Krzysztof Parzyszek | 2016-07-15 | 1 | -0/+28 |
| * | [Hexagon] Replace postprocessDAG with a more elaborate DAG mutation | Krzysztof Parzyszek | 2016-07-15 | 1 | -10/+76 |
| * | [Hexagon] Add a scheduling DAG mutation | Krzysztof Parzyszek | 2016-07-15 | 1 | -0/+4 |
| * | CodeGen: Update DFAPacketizer API to take MachineInstr&, NFC | Duncan P. N. Exon Smith | 2016-02-27 | 1 | -2/+2 |
| * | Make MachineScheduler debug output less confusing. | James Y Knight | 2015-09-18 | 1 | -1/+5 |
| * | Move HexagonMachineScheduler to use the subtarget off of the | Eric Christopher | 2015-02-02 | 1 | -9/+6 |
| * | Fix null reference creation in ScheduleDAGInstrs constructor call. | Alexey Samsonov | 2014-08-20 | 1 | -1/+1 |
| * | Remove the TargetMachine forwards for TargetSubtargetInfo based | Eric Christopher | 2014-08-04 | 1 | -2/+6 |
| * | Fix 'platform-specific' hyphenations | Alp Toker | 2014-06-30 | 1 | -2/+2 |
| * | [C++] Use 'nullptr'. Target edition. | Craig Topper | 2014-04-25 | 1 | -8/+8 |
| * | [Modules] Fix potential ODR violations by sinking the DEBUG_TYPE | Chandler Carruth | 2014-04-22 | 1 | -2/+2 |
| * | Replace PROLOG_LABEL with a new CFI_INSTRUCTION. | Rafael Espindola | 2014-03-07 | 1 | -1/+1 |
| * | Factor MI-Sched in preparation for post-ra scheduling support. | Andrew Trick | 2013-12-28 | 1 | -7/+10 |
| * | Rename variables for consistency. | Eli Friedman | 2013-09-11 | 1 | -3/+3 |
| * | Fix unused variables. | Eli Friedman | 2013-09-10 | 1 | -2/+0 |
| * | mi-sched: Precompute a PressureDiff for each instruction, adjust for liveness... | Andrew Trick | 2013-08-30 | 1 | -5/+5 |
| * | Fix a memory leak in the hexagon scheduler. We call initialize here more | Chandler Carruth | 2013-07-27 | 1 | -0/+2 |
| * | Machine Model: Add MicroOpBufferSize and resource BufferSize. | Andrew Trick | 2013-06-15 | 1 | -2/+2 |
