| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| * | [RISCV] Fix incorrect FP base CFI offset for variable argument functions | Shiva Chen | 2020-06-25 | 1 | -2/+2 |
| * | [RISCV] Allow shrink wrapping for RISC-V | lewis-revill | 2020-01-14 | 1 | -4/+16 |
| * | [RISCV] Handle variable sized objects with the stack need to be realigned | Shiva Chen | 2019-11-16 | 1 | -11/+27 |
| * | [RISCV] Fix wrong CFI directives | Luís Marques | 2019-11-14 | 1 | -55/+0 |
| * | Revert "[RISCV] Fix wrong CFI directives" | Luís Marques | 2019-11-13 | 1 | -0/+55 |
| * | [RISCV] Fix wrong CFI directives | Luís Marques | 2019-11-13 | 1 | -55/+0 |
| * | [RISCV] Fix CFA when doing split sp adjustment with fp | Luís Marques | 2019-11-10 | 1 | -15/+25 |
| * | [RISCV][NFC] Add CFI-related tests | Luís Marques | 2019-11-10 | 1 | -0/+2 |
| * | [RISCV] Add support for -ffixed-xX flags | Simon Cook | 2019-10-22 | 1 | -0/+11 |
| * | [RISCV] Split SP adjustment to reduce the offset of callee saved register spi... | Shiva Chen | 2019-10-04 | 1 | -1/+85 |
| * | [RISCV] Support stack offset exceed 32-bit for RV64 | Shiva Chen | 2019-09-13 | 1 | -4/+2 |
| * | Revert "[RISCV] Support stack offset exceed 32-bit for RV64" | Shiva Chen | 2019-09-13 | 1 | -2/+4 |
| * | [RISCV] Support stack offset exceed 32-bit for RV64 | Shiva Chen | 2019-09-13 | 1 | -4/+2 |
| * | [RISCV] Convert registers from unsigned to Register | Luis Marques | 2019-08-16 | 1 | -12/+12 |
| * | [risc-v] Apply llvm-prefer-register-over-unsigned from clang-tidy to LLVM | Daniel Sanders | 2019-08-12 | 1 | -2/+2 |
| * | [RISCV] Minimal stack realignment support | Sam Elliott | 2019-08-08 | 1 | -2/+46 |
| * | [RISCV] Add CFI directives for RISCV prologue/epilog. | Hsiangkai Wang | 2019-06-12 | 1 | -3/+70 |
| * | Update the file headers across all of the LLVM projects in the monorepo | Chandler Carruth | 2019-01-19 | 1 | -4/+3 |
| * | [RISCV] Fix std::advance slowness | Ana Pazos | 2018-08-24 | 1 | -2/+1 |
| * | [RISCV] Add support for _interrupt attribute | Ana Pazos | 2018-07-26 | 1 | -0/+30 |
| * | [RISCV] Preserve stack space for outgoing arguments when the function contain... | Shiva Chen | 2018-03-20 | 1 | -15/+36 |
| * | [RISCV] Implement frame pointer elimination | Alex Bradbury | 2018-01-18 | 1 | -19/+22 |
| * | [RISCV] Reserve an emergency spill slot for the register scavenger when neces... | Alex Bradbury | 2018-01-11 | 1 | -0/+19 |
| * | [RISCV] Support stack frames and offsets up to 32-bits | Alex Bradbury | 2018-01-10 | 1 | -7/+23 |
| * | [RISCV] Support for varargs | Alex Bradbury | 2018-01-10 | 1 | -3/+12 |
| * | [RISCV] Implement prolog and epilog insertion | Alex Bradbury | 2017-12-11 | 1 | -2/+145 |
| * | [RISCV] Support lowering FrameIndex | Alex Bradbury | 2017-12-11 | 1 | -0/+29 |
| * | [RISCV] Initial codegen support for ALU operations | Alex Bradbury | 2017-10-19 | 1 | -0/+29 |
