Here is the circuit schematic.
Consider Loading effect in feedback and break the loop.
Simplify the circuit.
$$A_{v,open} = \frac{V_{out}}{V_{in}} = -\frac{g_{m1} R_F R_D} {R_S +R_F}$$
Calculate \$\beta\$ in two port feedback network.
$$ \beta = g_{21}=\frac{V_2}{V_1} |_{I_2 = 0} = 1 $$
$$\Rightarrow LG = A_{v,open} \beta = -\frac{g_{m1} R_F R_D} {R_S +R_F}$$
In case we open the loop at the gate there will be no (remarkable) loading effect.
In this case, the open-loop gain (between gate and drain node with Vin=0) will be
$$A_{open}=-g_m [R_D \parallel(R_F +R_S)] $$
Hence, the gain between the gate and the node between Rs and Rf (the loop gain LG) is
$$LG =-\frac{R_S} {R_S + R_F} A_{open} = -g_m \frac{R_D R_S} {R_D+R_F+R_S} $$
EDIT: CALCULATION OF THE CLOSED-LOOP GAIN Acl
Comment: In the above calculation the gain Aopen (between gate and drain) is NOT identical to the gain Aol (between the circuits input and drain) which appears in the classical feedback expression and which is part of the loop gain. Hence, it will be calculated in the following. For this purpose, we realize that the output voltage at the drain node consists of two parts:
1.)
$$V_{out1} = \frac{R_D} {R_D + R_S + R_F} V_{in} \text{(caused directly through $R_S$ and $R_F$)}$$
2.) $$V_{out2}=-g_m \bigr[R_D \parallel (R_S + R_F)\bigr] V_G \text{(caused by the FETs current source)}$$
with $$V_G =V_{in} \frac{(R_F + R_D)} {(R_D + R_S + R_F)}$$
3.) From this, the gain Aol (open loop without feedback effect) can be found to be
$$A_{ol} = \frac{(V_{out1} + V_{out2})} {V_{in}} =...... = \frac{R_D (1-g_m R_F)} {(R_D + R_S + R_F)}$$
4.) Together with the loop gain LG we can find the closed-loop gain Acl:
$$A_{cl} =\frac{A_{ol}}{(1-LG)}=......= \frac{R_D (1-g_m R_F)} {(R_D+R_S+ R_F + g_m R_D R_s)}$$
