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| author | Chen Pei <cp0613@linux.alibaba.com> | 2025-11-14 15:12:15 +0800 |
|---|---|---|
| committer | Paul Walmsley <pjw@kernel.org> | 2025-11-16 10:37:38 -0700 |
| commit | e2cb69263e797c0aa6676bcef23e9e27e44c83b0 (patch) | |
| tree | 2ee529d1ba675798a9e22cd161cd0473b697042f /drivers | |
| parent | 7b090e7b910cafd245f23e56f3257a151ca0a289 (diff) | |
| download | net-e2cb69263e797c0aa6676bcef23e9e27e44c83b0.tar.gz | |
tools: riscv: Fixed misalignment of CSR related definitions
The file tools/arch/riscv/include/asm/csr.h borrows from
arch/riscv/include/asm/csr.h, and subsequent modifications
related to CSR should maintain consistency.
Signed-off-by: Chen Pei <cp0613@linux.alibaba.com>
Link: https://patch.msgid.link/20251114071215.816-1-cp0613@linux.alibaba.com
[pjw@kernel.org: dropped Fixes: lines for patches that weren't broken; removed superfluous blank line]
Signed-off-by: Paul Walmsley <pjw@kernel.org>
Diffstat (limited to 'drivers')
| -rw-r--r-- | drivers/perf/riscv_pmu_sbi.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/perf/riscv_pmu_sbi.c b/drivers/perf/riscv_pmu_sbi.c index e255c1b069ec18..7dd282da67cef9 100644 --- a/drivers/perf/riscv_pmu_sbi.c +++ b/drivers/perf/riscv_pmu_sbi.c @@ -1109,7 +1109,7 @@ static irqreturn_t pmu_sbi_ovf_handler(int irq, void *dev) /* compute hardware counter index */ hidx = info->csr - CSR_CYCLE; - /* check if the corresponding bit is set in sscountovf or overflow mask in shmem */ + /* check if the corresponding bit is set in scountovf or overflow mask in shmem */ if (!(overflow & BIT(hidx))) continue; |