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authorJeremy Linton <jeremy.linton@arm.com>2025-03-06 12:17:30 -0600
committerJeremy Linton <jeremy.linton@arm.com>2025-03-06 12:17:30 -0600
commitbe77fa82ad491f38537030c329c2a8e0612506a5 (patch)
tree5c77b521de9ee9d122c76254d13376b2ffb341cd /sys-utils/lscpu-arm.c
parentfe3f80038d128e42536fee323b0bc07ffb766bd5 (diff)
downloadutil-linux-be77fa82ad491f38537030c329c2a8e0612506a5.tar.gz
lscpu: New Arm part numbers
Arm has announced the Cortex-A320 and published the TRM here: https://developer.arm.com/documentation/109551 The Cortex-A520AE with a TRM here: https://developer.arm.com/documentation/107726 The Cortex-A720AE with a TRM here: https://developer.arm.com/documentation/102828 The Neoverse-V3AE with a TRM here: https://developer.arm.com/documentation/101595 Signed-off-by: Jeremy Linton <jeremy.linton@arm.com>
Diffstat (limited to 'sys-utils/lscpu-arm.c')
-rw-r--r--sys-utils/lscpu-arm.c4
1 files changed, 4 insertions, 0 deletions
diff --git a/sys-utils/lscpu-arm.c b/sys-utils/lscpu-arm.c
index b2677539ac..8745599d4c 100644
--- a/sys-utils/lscpu-arm.c
+++ b/sys-utils/lscpu-arm.c
@@ -93,10 +93,14 @@ static const struct id_part arm_part[] = {
{ 0xd80, "Cortex-A520" },
{ 0xd81, "Cortex-A720" },
{ 0xd82, "Cortex-X4" },
+ { 0xd83, "Neoverse-V3AE" },
{ 0xd84, "Neoverse-V3" },
{ 0xd85, "Cortex-X925" },
{ 0xd87, "Cortex-A725" },
+ { 0xd88, "Cortex-A520AE" },
+ { 0xd89, "Cortex-A720AE" },
{ 0xd8e, "Neoverse-N3" },
+ { 0xd8f, "Cortex-A320" },
{ -1, "unknown" },
};