This device tree node defines the pinmux configuration for two signals of the imx6q processor on the board to be used as GPIOs (for a bitbanged i2c controller).
The relevant documentation file is: fsl,imx-pinctrl.txt
Especially, this part is relevant here:
Required properties for pin configuration node:
- fsl,pins: each entry consists of 6 integers and represents the mux and config setting for one pin. The first 5 integers are specified using a PIN_FUNC_ID macro,
which can be found in imx*-pinfunc.h under device tree source folder.
The last integer CONFIG is the pad setting value like pull-up on this
pin. And that's why fsl,pins entry looks like in
the example below.
Bits used for CONFIG: NO_PAD_CTL(1 << 31): indicate this pin does not
need config.
The two PIN_FUNC_ID macros
MX6QDL_PAD_GPIO_6__GPIO1_IO06, MX6QDL_PAD_KEY_COL2__GPIO4_IO10
are directly taken from this file: imx6q-pinfunc.h
The 0x80000000 value next to these macros is the NO_PAD_CTL(1 << 31) macro from above. This means that that the pins are not configured with the pinmux possibilities detailed there: fsl,imx6q-pinctrl.txt