Pass variable to child make only if defined

Question

I can pass a variable to child make using make -C VAR=$(VAR) target (preferring this to export because the variable is only meaningful for a single target). However, it appears that if VAR variable isn't defined in parent, child gets an empty string (it has VAR ?= ..., and the value of VAR is empty). How can I avoid this?

It looks like a variation on Define make variable at rule execution time should work for my specific usecase, but it requires the parent Makefile to know child's default value, which I want to avoid.

MadScientist · Accepted Answer · 2017-01-25 16:25:49Z

4

You should always use $(MAKE) when invoking sub-makes, never make explicitly. Also you're missing a directory after the -C in your examples.

What about something like:

$(MAKE) $(if $(VAR),VAR=$(VAR))

answered Jan 25, 2017 at 16:25

MadScientist

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