Here's my problem : I have a makefile file containing the info to compile everything in my project to make my life easier, but it is giving me some headaches recently.
It can compile multiple files, such as this :
objects/io.o: sources/io.cpp
@g++ -c $< -o $@ -std=c++11
objects/map.o: sources/map.cpp
@g++ -c $< -o $@ -std=c++11
At the top of the makefile, I have variables declared as such :
IO="objects/io.o"
MAP="objects/map.o"
[... other object files ...]
ALL="$(IO) $(MAP) [...]"
When I want to compile my main file, I use this command :
main.exe: tests/main.cpp
@g++ $< $(ALL) -o $@ -std=c++11
When I compile this problem manually (inputting everything in one line of command, instead of making make main.exe) it compiles without problems.
However, when I use the make command for the project, the following error pops up :
clang: error: no such file or directory: 'objects/io.o objects/map.o [...]'
make: *** [main.exe] Error 1
Can I not use variables this way ? I'm extremely confused. I know for a fact those files are compiled, it just seems the make utility doesn't understand file paths.