Using Variable Manipulations in Makefile

Question

I am trying to create a Makefile with target file name = folder name. Instead of hard coding it I used the function

FILE=$(PWD##*/)

I also tried FILE=$(echo PWD##*/) and FILE=$(echo $(PWD##*/)). But I am getting an error: un-terminated variable reference. I know it's difficult to do such variable manipulations in Makefile. Is there a work around?

Thanks

To clarify Andrew Gillis's answer below, makefiles are not shell scripts, and you can't use shell script syntax directly when assigning makefile variables. The ##*/ syntax works with shell variables, inside shell scripts. It won't work with make variables, within makefiles. — MadScientist
– MadScientist, Commented Oct 13, 2017 at 17:40

gammazero · Accepted Answer · 2019-07-19 06:06:37Z

1

Setting FILE like this should work:

FILE = $(notdir $(PWD))

An alternative is to call out to shell to do the same:

FILE = $(shell basename $${PWD})

edited Jul 19, 2019 at 6:06

answered Oct 12, 2017 at 23:57

gammazero

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4 Comments

Learner27 Over a year ago

It worked the first time but when I tried re running it : it says Circular reference , dependency dropped.

gammazero Over a year ago

generally that means a target has a dependency, and that dependency has a dependency on the target

MadScientist Over a year ago

Put another way, that error has nothing to do with this issue and you haven't shown any part of your makefile that would help diagnose it. You should try to figure it out yourself and if you can't, open a new question with more details of your makefile related to the lines referenced in the error message from make.

MadScientist Over a year ago

Also, the quoting above is wrong: you should be using $${PWD} not \${PWD}

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