Why should be used in twice "new" in systemverilog?

Question

Would you let me know why do we have to have the "new" keyword in twice in systemverilog?

 class MyClass;
   int number; 
   function new(); 
     number = 0; 
   endfunction
 endclass

 module test;
   MyClass test1 = new();
 endmodule

As you can see, there are used in twice "new" keyword.

Could you let me know why do we need to use in twice?

Andriy Gordiychuk · Accepted Answer · 2018-08-10 01:18:49Z

1

function new();
    number = 0; 
endfunction

provides implementation of the function new(). When we call:

MyClass test1 = new();

we are creating test1. In order to create it, we call function new(), whose implementation we defined above. When we call new() it will ensure that property number of test1 is initialized to 0 (because that is what is happening inside of new()).

I hope my explanation is clear.

answered Aug 10, 2018 at 1:18

Andriy Gordiychuk

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