diff options
| author | Allan Sandfeld Jensen <allan.jensen@qt.io> | 2024-10-01 12:06:14 +0200 |
|---|---|---|
| committer | Allan Sandfeld Jensen <allan.jensen@qt.io> | 2024-10-02 08:33:13 +0200 |
| commit | 3de914eef55351e2e7395a8e8ae57553f6218516 (patch) | |
| tree | fe74614e21f217d1f07304e4abc8910d6004dfdd /src/corelib/global/qsimd.cpp | |
| parent | 0f20feea2112c2391e274dc4e81aa38a738b7023 (diff) | |
Add ARM SVE detection
Limited to ARM64 and little-endian to keep our code simple.
Change-Id: Ie65f71a31ca98d6929561d4b2ee1e9332b3a82d8
Reviewed-by: Thiago Macieira <thiago.macieira@intel.com>
Diffstat (limited to 'src/corelib/global/qsimd.cpp')
| -rw-r--r-- | src/corelib/global/qsimd.cpp | 18 |
1 files changed, 16 insertions, 2 deletions
diff --git a/src/corelib/global/qsimd.cpp b/src/corelib/global/qsimd.cpp index 28d25b5baca..b4fff814e6c 100644 --- a/src/corelib/global/qsimd.cpp +++ b/src/corelib/global/qsimd.cpp @@ -49,6 +49,7 @@ // copied from <asm/hwcap.h> (Aarch64) #define HWCAP_AES (1 << 3) #define HWCAP_CRC32 (1 << 7) +#define HWCAP_SVE (1 << 22) // copied from <linux/auxvec.h> #define AT_HWCAP 16 /* arch dependent hints at CPU capabilities */ @@ -75,13 +76,15 @@ uint arraysize(T (&)[N]) neon crc32 aes + sve */ static const char features_string[] = "\0" " neon\0" " crc32\0" - " aes\0"; -static const int features_indices[] = { 0, 1, 7, 14 }; + " aes\0" + " sve\0"; +static const int features_indices[] = { 0, 1, 7, 14, 19 }; #elif defined(Q_PROCESSOR_MIPS) /* Data: dsp @@ -118,6 +121,8 @@ static inline quint64 detectProcessorFeatures() features |= CpuFeatureCRC32; if (auxvHwCap & HWCAP_AES) features |= CpuFeatureAES; + if (auxvHwCap & HWCAP_SVE) + features |= CpuFeatureSVE; # else // For ARM32: if (auxvHwCap & HWCAP_NEON) @@ -156,6 +161,12 @@ static inline quint64 detectProcessorFeatures() if (sysctlbyname("hw.optional.arm.FEAT_AES", &feature, &len, nullptr, 0) == 0) features |= feature ? CpuFeatureAES : 0; #endif +#if defined(__ARM_FEATURE_SVE) + features |= CpuFeatureSVE; +#else + if (sysctlbyname("hw.optional.arm.FEAT_SVE", &feature, &len, nullptr, 0) == 0) + features |= feature ? CpuFeatureSVE : 0; +#endif return features; #elif defined(Q_OS_WIN) && defined(Q_PROCESSOR_ARM_64) features |= CpuFeatureNEON; @@ -174,6 +185,9 @@ static inline quint64 detectProcessorFeatures() #if defined(__ARM_FEATURE_CRYPTO) features |= CpuFeatureAES; #endif +#if defined(__ARM_FEATURE_SVE) + features |= CpuFeatureSVE; +#endif return features; } |