Makefile implicit rules matching .c OR .cpp

Question

I'm trying to add an implicit rule to a Makefile, and I'd like it to handle compilation of .c and .cpp files the same way. The rule I have for .c files is as follows:

%.obj: %.c
    cl /c $(CFLAGS) $<

What I'd like, though, is for the right side of the pattern to match .c OR .cpp, depending on which file is available. Is this possible? I've perused the Make manual, but haven't found what I'm looking for. Any help would be greatly appreciated.

Dirk is no longer here · Accepted Answer · 2013-07-31 22:42:54Z

5

Just use two rules which is equivalent to "or" in the make language:

%.obj: %.c
    cl /c $(CFLAGS) $<

%.obj: %.cpp
    cl /c $(CFLAGS) $<

At the end these are two different source languages and you may well end up desiring different flags.

answered Jul 31, 2013 at 22:42

Dirk is no longer here

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2 Comments

Alex Broadwin Over a year ago

Ah, fantastic, thanks! I had misinterpreted something from the manual as meaning that the above would override the previous rule rather than function as an OR, and thus hadn't even tried it. Much appreciated!

Dirk is no longer here Over a year ago

Come to think about it is more like a switch or simple alternates -- these are after all different source files.

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