Compiling Verilog HDL in Quartus

Question

I'm using Quartus to run simulations and analyze Verilog code. I've searched the Internet and Stack Overflow but haven't seem to come up with answers for my question.

I want to run the RTL Viewer with Verilog code I open in Quartus, but when I open the Verilog code itself, the compile and other options are inactive. I noticed though that when I open a QPF file that it seems to work.

Do I need to create a QPF file in order to use the RTL Viewer? And if so, how could I do that with existing Verilog code I have?

Qiu · Accepted Answer · 2017-11-08 11:44:05Z

3

To be able to use RTL Viewer, you need to run at least Analysis & Elaboration task in Quartus software. This task generates Pre-Synthesis Netlist based on your logic (i.e. code) (compare: Intel® Quartus® Prime Standard Edition Handbook, pp. 791)), which is used by RTL Viewer. You won't be able to run this task, unless you created Quartus Project.

QPF file is just Quartus Project File. You can create new project and simply add the code you have created earlier. Just press Project > Add/Remove Files in Project.

answered Nov 8, 2017 at 11:44

Qiu

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