verilog, binary length of a parameter

Question

My module gets a parameter and I want to have a counter in my code to that value. say for example, parameter n=16 and I want to define reg [x:0] i so I can count to n. how can I find x ? there should be a real easy way ?

dwikle · Accepted Answer · 2012-12-09 04:31:41Z

3

There are a couple of options, depending on what your tools support.

Write your own log2 function
Use $clog2

There is a lengthy discussion of this here: http://www.rhinocerus.net/forum/lang-verilog/646074-how-get-bit-width-value-verilog-compile-time.html

answered Dec 9, 2012 at 4:31

dwikle

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Morgan Over a year ago

You could then instantiate reg [$clog(n)-1:0] i or integer i_w = $clog(n); reg [i_w-1:0] i

amirhossein · Accepted Answer · 2012-12-08 19:26:54Z

2

you must use generate statement here are some samples http://www.rhinocerus.net/forum/lang-verilog/431130-using-generate-statement-verilog.html

answered Dec 8, 2012 at 19:26

amirhossein

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