2D Arrays in Verilog

Question

I have defined

reg bricks[0:3][0:7]

in Verilog Module. How can I assign this 2d array as

{{1,1,1,0,1,1,1},{1,1,1,0,1,1,1},{1,1,1,0,1,1,1},{1,1,1,0,1,1,1}}.

Please help

Are you sure you want a 2d array of bits, and not a 1d array of a multi-bit value? e.g. reg [7:0] bricks[0:3] — dwikle
– dwikle, Commented Apr 10, 2013 at 19:17
this link covers some of what you are asking. As mentioned there you cannot do a direct initialization the way you mentioned in verilog. But tools that synthesize system verilog might support the format you have. — vinay samuel
– vinay samuel, Commented Aug 13, 2013 at 15:39

chitranna · Accepted Answer · 2013-04-10 23:01:59Z

3

reg bricks [0:3][0:7];     //creates an unpacked array 
                           // It means you can access individual bits

bricks[1][0] = 0 ;         // Assigns 0 to the bit referenced by 1 and 0 

bricks [2] = 0 ;           // Illegal Syntax

bricks [1][0:3] = 0 ;      //Illegal Syntax

System verilog provides much more flexibility

answered Apr 10, 2013 at 23:01

chitranna

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