I have a Boolean function minimize and I want to create it using VHDL. I created it with circuits and it works perfect but when I create it using VHDL, it gives a different output. Can someone check my Boolean function and code and help debug?
Here is the Boolean function
Q0 = A0 + A1 + (~A2 * ~A3 * ~B0 * (B1 + ~B2 * B3))
Here is my code for for the boolean function:
Q0 <= (A0) or (A1) or (not A2 and not A3 and not B0 and B1) or (not A2 and not A3 and not B0 and not B2 and B3);