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I have a Boolean function minimize and I want to create it using VHDL. I created it with circuits and it works perfect but when I create it using VHDL, it gives a different output. Can someone check my Boolean function and code and help debug?

Here is the Boolean function

Q0 = A0 + A1 + (~A2 * ~A3 * ~B0 * (B1 + ~B2 * B3))

Here is my code for for the boolean function:

Q0 <= (A0) or (A1) or (not A2 and not A3 and not B0 and B1) or (not A2 and not A3 and not B0 and not B2 and B3);
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  • Other than the manual application of the distributive law, the two look identical to me. Can you please give us a complete, compilable code example that demonstrates the problem? Commented Oct 25, 2013 at 13:34
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    Looks okay to me. Since you're asking for help debugging, could you give us an idea what's happening that you're not expecting? Commented Oct 25, 2013 at 13:51

1 Answer 1

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In the rewrite to VHDL it looks like you assume that the * has higher priority than + in the boolean expression, so the last part of the boolean expression is as:

B1 + ~B2 * B3  = B1 + (~B2 * B3)

However, in VHDL the and and or operators have the same precedence and are left associative. The not operator has higher priority so OK to write before argument without "()".

So if + represents or, * represents and, and ~ represents not, then the last part of the above expression in VHDL is:

B1 or not B2 and B3 = (B1 or not B2) and B3

The original expression written with VHDL operator precedence is thereby:

... ~B0 * ((B1 + ~B2) * B3)

So the * after ~B0 can not distribute over the + in B1 + ~B2 * B3 when applying VHDL operator precedence of * and +.

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2 Comments

I assume this is why HellMan manually applied the distributive law. In the given VHDL code, and and or are not mixed without parentheses, so there is no ambiguity. If he meant (B1 + ~B2) * B3 in the boolean expression, then of course using the distributive law is incorrect.
And then there were parenthesis.

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