How to communicate three (or more) modules in Verilog?

Question

I want to communicate three modules, one is a control unit, second is an arithmetic unit, and the third is Ram-like memory.

I'm a beginner, I know that I can connect two modules by instantiate one inside the other. For example the ALU ports inside the Control Unit.

What I want to do now is to extract a data from the RAM and send it to the ALU, only if Control Unit ask it to do it.

So it seems I would have to instantiate the same module, some ports at the Control unit and some of the (the data) to the ALU.

// In the Control Unit part of the port of the same instantiation

RAM_U RAM_U_inst1 (
.read (read)
);


// In the ALU module the other part

RAM_U RAM_U_inst1 (
.data (data)
);

In this case when RAM_U receive the order to read, it will send the data to the ALU.

Is this the correct way to do this? FPGA Synthesizable

Prakash Darji · Accepted Answer · 2016-03-23 09:21:17Z

4

Please don't do this, either make instance of all module in single top module called module micro_controller(....).

What I want to do now is to extract a data from the RAM and send it to the ALU, only if Control Unit ask it to do it.

Control unit will give address to RAM, and fetch data from it, and then provide to ALU, now result produced by ALU or RAM write can also done with control unit.

Are you able to understand?

edited Mar 23, 2016 at 9:21

answered Mar 23, 2016 at 9:15

Prakash Darji

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5 Comments

sujeto1 Over a year ago

So, having the top module as you said, I still don't understand how to communicate the modules. Should I use registers in the top module, or a FSM?

Prakash Darji Over a year ago

ok! I will tell you how to do it. When instruction comes like ADD A, 25H; // add A + content at mem location 25H When control unit decode this instruction it will come to know that, it has to fetch data from location 25H, so it drive its memory interface for reading 25H location when read data comes, it will fed to ALU with Operand as read value and instruct ALU to do addition, some part of OP-Code given to ALU for doing addition too. If you still not understand copy your three modules. I'll check possible connections.

sujeto1 Over a year ago

Thanks you gave me good idea, although am not exactly doing a microcontroller.

Prakash Darji Over a year ago

Oh yeah! I know, but it is just concept of embed functional block and architecture development.

Prakash Darji Over a year ago

And yes, your control unit has to have FSM for controlling sequence of operation.

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