How can I write my C program in two functions?

Question

I was wondering how I can write my C code (just one single .c with a couple of different functions) into just two functions with inputs and outputs. I am looking for these because I am going two put some part of my code into CPU and leave the other in FPGA, they can communicate with each other via the interface in Zynq family board (e.g. ZC706).

In this regards, via the Vivado HLS, I have to have just one single Function which can be translated to e.g. VHDL via the Vivado HLS and the other function can stay in CPU.

Thanks in advance and if needed can share my code.

Yes, it is needed, please share your code in the shape of a minimal reproducible example. FPGA does not require putting everything into a single function. Start by rearranging your code into two separate parts which only communicate via an interface which can be mapped on the described channel. — Yunnosch
– Yunnosch, Commented May 4, 2018 at 17:27
And on FPGAs you don't write functions in the sense of C, but you describe a hardware to be synthesized. — Eugene Sh.
– Eugene Sh., Commented May 4, 2018 at 17:28

akira hinoshiro · Accepted Answer · 2018-05-07 14:43:12Z

Not at all!

There are no pthreads or functions in FPGA. You must think the FPGA is more like a circuit. There are physical connections like wires. Internally especially in the Zynq family you can communicate through the RAM, DMA controllers or via Registers. There is documentation from Xilinx, what you need is AXI/AXI Stream.

But what you want to do is writing any C code and run them in the FPGA area like in a processor. And this approach is not promising.

In Vivado HLS you can write "functions" in C/C++/OpenCL/SystemC but it is only a block with inputs and outputs translated to a hardware description language (VHDL/Verilog). You have to export it and add it in your Vivado Project to use it. At this point maybe your IP created in HLS will do something you expect, but there is still a lot of work todo connecting the Ports in the right manner.

My advice is get familiar with the Zynq family and especially the AXI protocol. If you feel familiar with DMA/AXI4/AXI4S and how to access them from ARM and Logic then start using HLS. Otherwise you will not have the feeling how to write code HLS understands.

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