Is it possible to fill an array with a single operation?

Question

In C, you can do this:

int a[5] = {1, 2, 3, 4, 5};

On VHDL, I need to do about the same thing in a function. Now it looks like this:

type rom_type is array (0 to 1) of std_logic_vector(1 downto 0);

function get_rom return rom_type is
    variable rom: rom_type;
begin
    rom(0) := "10";
    rom(1) := "01";

    return rom;
end;

Is there a way to make the array filling the same as in c? Something like this:

rom := {"10", "01"};

How much research effort is expected of stack overflow users? might explain the downvotes. Tricky's answer doesn't add any enlightenment. An object value of a composite array type can be an aggregate expression of which he provided no insight into semantic rules or useful search terms. The formal language VHDL's syntax and semantics defined in IEEE Std 1076 can be revision specific and are originally derived from Ada and not C. rom := (0 => "10", 1 => "01"); would also be valid. — user16145658
– user16145658, Commented Feb 9, 2024 at 15:49

Tricky · Accepted Answer · 2024-02-09 09:36:22Z

0

Yes

rom := ("10", "01");

answered Feb 9, 2024 at 9:36

Tricky

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