UHD 4.7 FPGA image creation

Question

I have an Ettus E310, and I used UHD 3.14 to create a custom FPGA image containing the Window, FFT, and LogPwr RFNoC blocks. In that version, I used uhd_image_builder.py like so:

source ~/rfnoc/src/uhd/fpga-src/usrp3/top/e300/setupenv.sh
cd ~/rfnoc/src/uhd/fpga-src/usrp3/tools/scripts
./uhd_image_builder.py fft window logpwr
-t E310_RFNOC_sg3 -d E310 -m 5 --fill-with-fifos

I then connected the blocks together in my C++ app using uhd::rfnoc::graph::connect(). Everything works great.

Now, I'm trying to migrate to UHD 4.7. I'm trying to create an FPGA image that includes the same blocks.

I noticed that uhd_image_builder.py is has been replaced by rfnoc_image_builder. Instead of simply listing the blocks to include on the command line, I must edit a .yaml file and add the desired blocks to the noc_blocks section and wire them all together. I'm new to this, and I have no idea how to wire them all together.

Is there any way to just specify which blocks to include, then worry about connecting them later at runtime via uhd::rfnoc::graph::connect()?

And, yes, I did read https://kb.ettus.com/Getting_Started_with_RFNoC_in_UHD_4.0#RFNoC_Image_Builder, and it provides a nice concrete example, but it doesn't explain what's happening to a level that would enable me to create an FPGA image containing the Window, FFT, and LogPwr RFNoC blocks.

Can anyone enlighten me, or point me to a resource that explains FPGA custom images in UHD 4.x?

Glad you were able to figure it out! I'm not an FPGA guy, but you can also answer your own questions too if it was a solution ! — kyrlon
– kyrlon, Commented Jul 1, 2024 at 21:49
You should in fact post your solution as the answer so that the question can be properly closed. — 500 - Internal Server Error
– 500 - Internal Server Error, Commented Jul 1, 2024 at 22:45
Thanks for the comments; this is my first post, and I'm just getting used to the etiquette. I actually attempted to post my solution as an answer, but my character limit was much too low, so I couldn't post the entire solution. This led me to revise the question to include the solution. — Michael Longtin
– Michael Longtin, Commented Jul 3, 2024 at 12:43

gre_gor · Accepted Answer · 2024-08-28 16:18:57Z

^{Extracted from the question.}

The important thing to remember is that all streaming endpoints are automatically connected to the crossbar, meaning you can dynamically connect RFNoC blocks in code. In my case, I always want window->FFT->logpwr. The endpoints are connected to window and logpwr. I would never want to inject something at the input to FFT or inspect something at the output of FFT. Making window->FFT->logpwr a static route also saves FPGA resources, leaving more room for other blocks.

Here are the connections in the .yaml file:
  - { srcblk: radio0,   srcport: ctrlport, dstblk: _device_, dstport: ctrlport }
  - { srcblk: _device_, srcport: radio,    dstblk: radio0,   dstport: radio    }
  - { srcblk: _device_, srcport: time,     dstblk: radio0,   dstport: time     }
  - { srcblk: ep_fft, srcport: out0,  dstblk: window0,   dstport: in_0 }
  - { srcblk: window0,   srcport: out_0, dstblk: fft0, dstport: in_0  }
  - { srcblk: fft0, srcport: out_0, dstblk: logpwr0, dstport: in_0  }
  - { srcblk: logpwr0, srcport: out_0, dstblk: ep_fft, dstport: in0  } ```

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