How to get my 4:1 multiplexer outputs right when implementing a function?

Question

I've been assigned to create a 4:1 multiplexer in Verilog, and then implement the function:

F(X, Y, Z) = (X*Y') + (Y'*Z') + (X'*Z')

If I did the everything right on paper, the s0 = Y, s1 = Z, I0 = 0, I1 = X, I2 = X', and I3 = 1. I tried to implement that into Verilog, but for some unknown reason, the only output that the simulation shows is "Z". I believe I read somewhere that Z is the default output for an undefined wire, so how can I make it so that the simulation reads the appropriate values? Also, since that was the only output I got, I tried changing some things up and got the "concurrent assignment to a non-net 'tx' is not permitted" error, so with me changing things up in the test bench the format's probably weird. Code is as follows:

Multiplexer and Implementation Modules:

module mux4to1 (y, z, I0, I1, I2, I3, f);
input y, z, I0, I1, I2, I3;
output f;
wire yb, zb, w0, w1, w2, w3;
not (yb, y);
not (zb, z);
and (w0, yb, zb, I0);
and (w1, yb, z, I1);
and (w2, y, zb, I2);
and (w3, z, z, I3);
or (f, w0, w1, w2, w3);
endmodule

module fn_using_mux(Y, Z, X, F);
input Y, Z;
output X, F;
mux4to1 h2 (Y, Z, 0, X, ~X, 1);
endmodule

Test Bench:

module mux_test;
reg tx, ty, tz;
wire tf;
fn_using_mux m1 (ty, tz, tx, tf);
initial begin
$monitor(tx, ty, tz, tf);
ty = 0; tz = 0; #100;
ty = 0; tz = 1; #100;
ty = 1; tz = 0; #100;
ty = 1; tz = 1; #100;

end
initial begin
$dumpfile("dump.vcd");
$dumpvars(1);
end
endmodule

DarkBee · Accepted Answer · 2025-04-24 12:56:37Z

I ran your code on 2 different simulators, and I see compiler warnings. For example, I see this type of a warning:

mux4to1 h2 (Y, Z, 0, X, ~X, 1);
         |
xmelab: *W,CUVWSP (1 output port was not connected:
xmelab:   f

The problem is that the mux4to1 module has 7 ports, but you only made connections to 6 of them. The warning tells you that the f output port was not connected.

If your simulator did not generate warning messages, you can run your code on EDA Playground to see the warnings.

You are using connections-by-order, which is error-prone. Use connections-by-name instead:

mux4to1 dut (
    .I0  (),
    .I1  (),
    .I2  (),
    .I3  (),
    .y   (Y),
    .z   (Z),
    .f   ()
);

I just guessed that you want to connect Y to the y port. If that is not what you wanted, you should change the connection. You should also add connections for each ().

Another problem is that you did not make a connection to the F output port inside the fn_using_mux module.

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