Quartus II use file only in simulation

Question

I want to run a simulation in Quartus. So I assign a Testbench in the Assignment menu. My testbench includes my DUT(D) and a extra component(E), which is only for simulation (so this component includes statements which are not syntesizeable). My simulation runs if I remove E from my Testbench, but when I want to include E in my Testbench, I get the error from modelsim:

 my_testbench.vhd(197): (vcom-1195) cannot find expanded name "mylib.only_for_simulation".

How could I make Quartus/Modelsim to compile the E file?

Is the extra component written in the testbench file or a separate file? — Martin Zabel
– Martin Zabel, Commented Jan 16, 2016 at 17:28
Sounds like you haven't compiled only_for_simulation into mylib. Did you compile it into the default work library by mistake? — user1818839
– user1818839, Commented Jan 16, 2016 at 23:17
@MartinZabel : yeah, its in an extra file @BrianDrummond : I added it into mylib. If I go to the Design Units view, this file is in the right library. But maybe it don't compile. How to say Quartus to compile this file also only for simulation? — alabamajack
– alabamajack, Commented Jan 17, 2016 at 5:20

Martin Zabel · Accepted Answer · 2016-01-17 11:24:44Z

3

When you start a simulation, Quartus analyzes all files specified in the project settings (accessible via menu Assignment -> Settings -> Files). But, it elaborates only the entities which are required for the DUT starting from the top-level entity (see menu Assignment -> Settings -> General). For example, in my test project top specifies the entity of the DUT, and my_testbench and only_for_simulation are required for simulation only. This is the output from Quartus in the messages window after starting the simulation:

Info (12021): Found 2 design units, including 1 entities, in source file my_testbench.vhdl

Info (12021): Found 2 design units, including 1 entities, in source file top.vhdl

Info (12021): Found 2 design units, including 1 entities, in source file only_for_simulation.vhdl

Info (12127): Elaborating entity "top" for the top level hierarchy

Only the files which store the entities found during elaboration are added automatically to the script to start the ModelSim simulator. Thus, it doesn't matter if my_testbench and only_for_simulation are listed as project files. Further simulation files must be always specified in the test-bench setup accessible via menu Assignment -> Settings -> Simulation -> Compile test bench -> Test Benches -> New/Edit. There, you have to list the files storing my_testbench and only_for_simulation. And you have to list them in the right compilation order, that is, only_for_simulation before my_testbench. Within this dialog, you can also set the library of only_for_simulation to mylib via Properties. Here, is a screenshot of the my test-bench setup.

The generated ModelSim script is stored in the sub-directory simulation/modelsim in file with extension .do. It lists all files to be compiled by ModelSim. And ModelSim compiles them in the given order only.

edited Jan 17, 2016 at 11:24

answered Jan 17, 2016 at 11:11

Martin Zabel

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2 Comments

alabamajack Over a year ago

Thank you! Thats exactly I need. Do you figure that out by trying it (thats including knowing it because of spending so much time with Quartus ;) or is there in any WP or AppNote a chapter about this thing?

Martin Zabel Over a year ago

I'm doing a lot of FPGA design with Quartus, so that, the first part of my answer was already in my mind. I have just to check if setting a library name for one of the simulation files also works. I can't say if there is a good WP or AppNote on this topic.

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