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If I have an array of like defined below...

type A_type is array (0 to 9) of integer;
signal my_array : A_type := (0, 1, 2, 3, 4, 5, 6, 7, 8, 9);

If later down the line I want to convert to a list of signed numbers representing the same numbers. Is there a way which I can complete the type conversion without having to do a for loop?

1 Answer 1

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No. You're going to need either a for loop or ten separate statements. The best way would be to write your own conversion function, but I guess you were really wanting to know whether the conversion could be done "in one go", so to speak.

There are two ways of converting types in VHDL. The first is a type conversion:

my_new_type_signal <= my_new_type(my_old_type_signal);

(or variable, obvs). This only works if my_new_type and my_old_type are closely related types. For example, integer and real are closely related, as are std_logic_vector and signed, but your two will not be.

The second way is to write a conversion function. Standard types (from the standard and numeric_std packages) have functions already written. Yours are not standard types, so you'll have to write your own.

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3 Comments

What LRM is that? IEEE Std 1076-2008 9.3.6 Type conversions, para 6 - "Explicit type conversions are allowed between closely related types. In particular, a type is closely related to itself. Other types are closely related only under the following conditions: — Abstract numeric types —Any abstract numeric type is closely related to any other abstract numeric type. — Array types —Two array types are closely related if and only if the types have the same dimensionality and the element types are closely related No other types are closely related." Hardly 4 pages.
I've misremembered. No, it doesn't go one for about four pages.
Not using a conversion function here either. A conversion function (6.5.7 Association lists, 6.5.7.1) has a single parameter while to_unsigned (IEEE) or conv_signed (Synopsys/Mentor) require two parameters.

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