I need to make a fpga module that can read and write to the ddr memory of the DE 10 standard fpga board. But I have no idea on where to start. Can some one please point me in a right direction.
Thank you.
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In case you just need to access ddr, instantiate the ddr sdram controller available from intel (beware, there's a lot of options related to memory chips used), and access it through avalon-mm interface, like any other peripheral. I don't think your task was to actually implement ddr controller yourself.Vlad– Vlad2019-08-16 14:03:01 +00:00Commented Aug 16, 2019 at 14:03
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What I really need to do is to write and read data (like an image) from the ddr3 as fast as possible from the FPGA side. For that how can I make an approach. I have not used a DDR before for FPGA designs. Any reference that you can suggest to get a start on that?BlazeCode– BlazeCode2019-08-16 15:01:40 +00:00Commented Aug 16, 2019 at 15:01
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Check if Altera has a DDR controller as ready-made IP. Do not try this yourself. You need years of experience for a complex block like that. I do no believe an amateur HDL designer can design a block like that. If want you can try, but I predict it will take you many, many months.Oldfart– Oldfart2019-08-16 15:08:07 +00:00Commented Aug 16, 2019 at 15:08
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'DE10 standard' has sdram on the fpga side, and ddr3 sdram on the HPS side. Do you want to access the fpga-side dedicated sdram (not ddr), or the memory that's connected to hard processor system? The approach will be very different.Vlad– Vlad2019-08-16 20:04:56 +00:00Commented Aug 16, 2019 at 20:04
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I need to access the HPS side ddr3BlazeCode– BlazeCode2019-08-16 23:06:29 +00:00Commented Aug 16, 2019 at 23:06
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1 Answer
Ideally you will take some demo project built for your exact board, and alter it accordingly to your needs.
The generic way - download the "SystemBuilder" sw from Terasic site (the manufacturer of the DE10 boards). Find your board, open "Resources" section and download needed stuff.
Run SystemBuilder, select the desired interfaces instantiated, including hard processor system. Systembuilder will create a template project with pin locations assigned.
Within your project run Qsys platform designer, instantiate the HPS core, configure the required interfaces (FPGA-to-HPS SDRAM Interface), fill in the settings for the sdram chips used. I can't remember if I've used some "Golden hardware reference design" project, but I had the needed numbers to configure ddr controller for exact chips on the other type of board (DE10-nano).
Run the tcl script "hps_sdram_p0_pin_assignments.tcl" to complete the ddr3 sdram pin assignment (standards applied, etc). On the fpga side then you'll have a memory-mapped interface, and you access ddr3 like it's just a static ram, but respecting the wait requests when controller asserts it.
It's very likely you'll find something pre-built in one of big archives present in "Resources" section on the Terasic site page for your board.
In any case, you'd better go through some tutorials on HPS instantiation, that's a huge topic, involving preparing the preloader that runs before linux, etc.
