Difference between variables defined with ascending vs. descending indexes

Question

Does it make a difference if you define indexes in descending or in ascending order at the outset?

Specifically, suppose I have the following items defined in a module:

output [7:0] o_RX_Byte;

reg [7:0] r_RX_Byte = 0;
reg [0:2] r_Bit_Index = 0;

If bit 8 is considered the most significant bit, which bit is being referred to in the statement:

r_RX_Byte[r_Bit_Index] <= i_RX_Serial;

That is, is the most significant bit of r_RX_Byte getting i_RX_Serial or is the least significant bit of r_RX_Byte getting i_RX_Serial?

Would it have made a difference if the the items had been defined instead as:

output [0:7] o_RX_Byte;

reg [0:7] r_RX_Byte = 0;
reg [0:2] r_Bit_Index = 0;

pl check if this is related: electronics.stackexchange.com/questions/191121/… — Im Groot
– Im Groot, Commented Jun 24, 2024 at 6:44

Huang JS Josh · Accepted Answer · 2024-07-12 10:59:55Z

-1

TL;DR: [7:0] vs [0:7] does DIFFER.

Long version:

given

wire [7:0] r_RX_Byte = 8'b1000_0000;

The bit[7] of the bus will be asserted. Not all the other bits.

On the other hand, given

wire [0:7] r_RX_Byte = 8'b1000_0000;

The bit[0] of the bus will be asserted. Not all the other bits.

answered Jul 12, 2024 at 10:59

Huang JS Josh

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