Comparing bits from std_logic_vector

Question

attempt #1

overflow_next <= (op1_shifted(word_width - 1) = op2(word_width - 1)) and (result_var(word_width - 1) /= op2(word_width - 1));

Error (10327): VHDL error at alu.vhd(99): can't determine definition of operator ""="" -- found 0 possible definitions

Error (10327): VHDL error at alu.vhd(99): can't determine definition of operator ""/="" -- found 0 possible definitions

attempt #2

overflow_next <= ((op1_shifted(word_width - 1) = '0') and (op2(word_width - 1) = '0') and (result_var(word_width - 1) = '1')) or ((op1_shifted(word_width - 1) = '1') and (op2(word_width - 1) = '1') and (result_var(word_width - 1) = '0'));

Error (10327): VHDL error at alu.vhd(99): can't determine definition of operator ""="" -- found 0 possible definitions

All signals and variables are std_logic_vector except word_width which is an integer generic. What's the problem here? I can compare standalone std_logic signals but not parts of std_logic_vector signals? Is there any workaround if what I'm trying to do is impossible?

Charles Steinkuehler · Accepted Answer · 2013-12-18 16:09:51Z

2

I suspect the error report is misleading and you need to properly construct a conditional signal assignment statement, such as:

overflow_next <= '1' when (op1_shifted(word_width - 1) = op2(word_width - 1)) and (result_var(word_width - 1) /= op2(word_width - 1)) else '0';

answered Dec 18, 2013 at 16:09

Charles Steinkuehler

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5 Comments

Miloš Rašić Over a year ago

Yeah, you are right, I think my expressions generate boolean as a result and I'm trying to assign it to std_logic. I hope the error reports are misleading as you say. I'll try to fix it tomorrow.

user1818839 Over a year ago

Then the error messages - while maybe confusing - are exactly correct; if all the "=" operators the compiler can find return boolean, then it cannot find one that returns the type you need. A perverse (but legal) way to solve the problem is to write your own equality operator, returning std_logic! Better, you could consider defining overflow_next as boolean. Alternatively, VHDL-2008 has some changes in this area.

Morten Zilmer Over a year ago

Derived by Brians comment, then if VHDL-2008 is used, it is a good solution to write the expression using ?= and ?/= instead of = and ?=, since simulation will then also show unknown values (X) due to argument as X, which is not the case when using ´'1' when ... else '0'´. The expression can thereby be written as

overflow_next <= (op1_shifted(word_width - 1) ?= op2(word_width - 1)) and (result_var(word_width - 1) ?/= op2(word_width - 1));

.

Miloš Rašić Over a year ago

For some reason, conditional signal assignment won't work. Reports syntax error near "when", expecting ";". Had to do it with a if/then/else but it's still a solution. Thanks.

Charles Steinkuehler Over a year ago

If/then/else is for use inside a process body. When/else is a concurrent statement, meant for use outside a process.

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