I have a table with a known number of elements. I would like to randomize its elements so that each time I display it, its elements are displayed in random order. in vhdl using Fpga stratix3
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1Welcome to Stack Overflow. It is expected that question-askers show some work and ask specific questions, eg "How can I generate a random number in VHDL?" (which almost certainly has been asked already and so there will be an answer). Anyway, you don't give enough information for anyone to answer your question, eg: Is this for hardware? Or for your testbench?Matthew– Matthew2019-06-21 13:18:26 +00:00Commented Jun 21, 2019 at 13:18
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To get you started: semi random values can be created with en.wikipedia.org/wiki/Linear-feedback_shift_registerPenguMC– PenguMC2019-06-25 11:53:07 +00:00Commented Jun 25, 2019 at 11:53
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1 Answer
There is no easy VHDL langage solution to generate random numbers on hardware. To generate a pseudo random number, you can use a LFSR. See for example: Pseudo Random Number Generator using LFSR in VHDL
To generate a true random number, you must create a ring oscillator random number generator. See for example: https://security.stackexchange.com/questions/81843/ring-oscillator-true-random-number-generator-trng-vs-physically-unclonable-fu
For simulation there is built-in support for random numbers in VHDL. See for example: Generating random integer in vhdl
You can then use the generated random numbers to randomize your array.
