Skip to main content
Electrical Engineering

Questions tagged [digital-logic]

Ask Question

Digital electronics treats discrete signals, unlike analog electronics which treats continuous signals. Digital logic is used to perform arithmetic operations with electric signals and constitutes the base for building CPUs.

5,004 questions
Newest Active Bountied Unanswered
Filter by
Sorted by
Tagged with
-4 votes
0 answers
80 views

I am three weeks into my first semester at uni and have been given a truth table, and asked to prepare a circuit with the minimum number of gates. This is my attempt at a circuit, I need to reduce the ...
Bob's user avatar
  • 1
0 votes
2 answers
89 views

Maybe it's very dumb question. But I'm just curious. For example I have On/Off switcher for some LED for indicate that you can start using some device. So this LED turning On from MC and signal rising ...
MrKimler's user avatar
  • 11
3 votes
1 answer
100 views

According to the table, is my Moore state diagram correct?
Mimi's user avatar
  • 31
3 votes
1 answer
192 views

What control (address, enable) voltages do i need if i want to drive a CD4067B that is powered with +/-12V? The datasheet is confusing. Is it 0V to VDD or is it VSS to around 0V? The part only accepts ...
James Scholl's user avatar
  • 307
0 votes
2 answers
131 views

I saw this gate implementation of a circuit using a NOT gate as one of the inputs for an AND gate. This meant that when the input goes from high to low, the AND gate output goes high for a fraction of ...
Aditya Bansal's user avatar
  • 23
1 vote
4 answers
192 views

I’m a computer science student currently building a 4-bit D-Flip-Flop counter. With the basic structure, the counter normally counts from 0 to 15 (a full 4-bit cycle). However, for my lab tomorrow I ...
rayan Khairi's user avatar
  • 21
5 votes
2 answers
353 views

I’m trying to understand the reasoning behind termination requirements in different differential signaling interfaces. For example, USB uses differential signaling (D+ and D–), but the standard does ...
Potionless's user avatar
  • 1,819
2 votes
0 answers
52 views

I am trying to understand the concept of Elmore delay calculating delay factor of the CMOS circuitries using RC approximation. According to CMOS VLSI Design : A Circuits and Systems Perspective ...
Aldrich Taylor's user avatar
  • 355
9 votes
4 answers
2k views

I have made this circuit on Proteus, a simple BCD to 7-segment display: But the segments for 6 and 9 are not completely lit. What could be the potential reasons? The decoder IC is CD4511 and a common ...
Humaira Razi's user avatar
  • 109
-3 votes
0 answers
29 views

I have this SOM module. I initially planned to boot the SOM module from a NAND Flash IC that uses a parallel interface (requiring address, clock, enable, and data signals). According to the datasheet, ...
Potionless's user avatar
  • 1,819
1 vote
2 answers
84 views

Circuit design using PCF8574, SN74HC05 and 2N7000 I (a hobbyist) would be glad if you can help me with following: I want to switch multiple external relays. In lack of ports, I decided to use the ...
al3c00's user avatar
  • 13
0 votes
1 answer
92 views

Please help me understand how propagation delay changes depending upon the input bit pattern in a ripple-carry adder. Take 2 cases: 100+011. here no carry generated or propagated 001+111. here carry ...
user339080's user avatar
  • 13
3 votes
1 answer
82 views

I’m a test checker for an Introduction to Digital Electronics course, and I’m currently reviewing student tests. The students were asked to implement the logic function OR(A, B, C) using PTL (Pass ...
Ben Shaines's user avatar
  • 335
2 votes
3 answers
463 views

I was asked to design a digital system that receives two inputs: X and X+2, and must output X+1, without using any adders or subtractors. (We weren't told what is the number of bits for X and X+2) I ...
Ben Shaines's user avatar
  • 335
3 votes
3 answers
326 views

While working on Digital logic, I encountered the problem of using a BCD switch to enter a binary number. For example, using a BCD switch, I can enter the number 117, which would be inserted into the ...
user992197's user avatar
  • 33
2 votes
3 answers
309 views

I am using AD5941 in my design. AD5941 AVDD and DVDD are powered separately using two regulators . Same LDO P/N is used.One for powering AVDD and the other for Powering DVDD. In my board, I have ...
Confused's user avatar
  • 4,055
0 votes
1 answer
69 views

I was reviewing the AM62L EVM (Evaluation Module) schematic and noticed that the UART lines (TX, RX) have external pull-up resistors to 3.3 V. However, when I checked the AM62L datasheet and technical ...
akash Pulikkal's user avatar
  • 81
4 votes
2 answers
180 views

I have an argument with a friend regarding the voltage between N and P and the voltage at OUT. I say that for A = '1' and B = '0': If Kn > Kp, so the voltage between the NMOS and PMOS is Vdd-Vtn ...
Ben Shaines's user avatar
  • 335
6 votes
3 answers
1k views

Are there any such components as a 12 volt NOR gate or similar?
jab1948's user avatar
  • 63
2 votes
3 answers
165 views

I have a digital scale with built in auto off timeout function pictured, is there a way to hack modify this PCB to bypass the auto off function after timeout? So when batteries are inserted it will ...
wdbwdb1's user avatar
  • 601
1 vote
1 answer
70 views

I would like to have a circuit that could control an existing DC motor driver (without any datasheet) from a single push button. A long press would activate the driver, and short presses would switch ...
baptistedftn's user avatar
  • 19
0 votes
5 answers
306 views

I'm getting into electrical circuits. I have a RGB LED strip with a 24 V common. I want to input the RGB signals into a microcontroller that has a 3.3V logic. What I have found online is to either use ...
Achen's user avatar
  • 11
3 votes
2 answers
134 views

I've tried to implement a JK flip flop in Verilog, but while testing, I found that whatever inputs of j and k I give on startup, until I reset the flip flop (j=0, k=1), the outputs will not be seen ...
Samy R.'s user avatar
  • 31
1 vote
3 answers
160 views

Is it possible to simplify the circuit by removing the logical NOTs while maintaining the identical output response to the input signal?
Arseniy's user avatar
  • 2,315
1 vote
2 answers
164 views

I need to design a circuit that can take a digital output from an MCU (3.3V) and amplify it to a selectable output voltage. The output voltage should be configurable between 3.3V, 5V, 12V, and 24V. ...
StBlub's user avatar
  • 21
0 votes
2 answers
113 views

There are some reference and logic circuits before the opamp. When the opamp output = HIGH, it triggers the thyristor. I used a thyristor because I want it to not only latch but stays constantly ...
Michael George's user avatar
  • 4,008
5 votes
8 answers
1k views

I was asked to design a digital system that receives an 8-bit binary input and outputs the binary position of the third '1' bit from the right (LSB side). The output should be a 3-bit binary number ...
Fourier_Asker's user avatar
  • 89
4 votes
6 answers
1k views

This is part of a bigger circuit where I have two frequencies coming from U1 and U2. Sometimes I want U1 to go to U3 and sometimes U2 to go to U3. I have used a transistor pair to hopefully enable ...
wonderfuliot's user avatar
  • 315
1 vote
1 answer
81 views

Context : I have been tasked with testing a HC-04 Ultrasonic sensor with Verilog, and below is the Verilog code, the testbench and the waveform that I am getting, ...
whatamidoing's user avatar
  • 169
0 votes
2 answers
86 views

I’m working with a PHY device as described in the datasheet (p. 158) of this PHY, and I’m trying to understand the Tready timing with an EEPROM connected to the device. According to the datasheet, the ...
Potionless's user avatar
  • 1,819
1 vote
3 answers
145 views

I am not so experienced in designing circuits. I have a circuit I need to reorient the logic in: I need to connect a timer's timeout output signal so that it switches the input of an Integrated ...
Daddedebad's user avatar
  • 23
1 vote
3 answers
118 views

I want to implement some buttons in my controll scheme to controll the operatings of the system controlled by a NUCLEO-H723ZG uC. For the switches i will be using ones actually rated for 230 V AC, ...
miha medved's user avatar
  • 123
5 votes
1 answer
253 views

I have a controller with a digital output configured as open collector. The wiring diagram in the manual is shown in the image below. The manual indicates that the diagram is internal (if I'm ...
DM010's user avatar
  • 61
-1 votes
1 answer
118 views

Interview Question: I have a small “race” problem to implement as an FSM using D flip-flops only. There are three lanes. At the end of each lane there is a pushbutton circuit that outputs a clean one-...
Ben Shaines's user avatar
  • 335
2 votes
2 answers
564 views

I was asked to build a 16:4 priority encoder using 4:2 encoders. I’ve seen the solution with four first-stage P.E.s feeding a fifth P.E., plus two muxes. My problem is the intuition: When I connect ...
Ben Shaines's user avatar
  • 335
0 votes
2 answers
184 views

I have a timing diagram with clk, input, and output signals (see image above). I was able to sketch a circuit implementation using flip-flops and logic gates, but I am struggling to describe it as a ...
Ben Shaines's user avatar
  • 335
2 votes
2 answers
386 views

I suspect this question will be trivial for many of you, but I haven't been able to find any answer online that satisfies my curiosity. I have an ACTIVE LOW relay module that connects to a GPIO [...
digitale's user avatar
  • 315
1 vote
1 answer
117 views

I know that asynchronous FIFO and handshake can do CDC, but the FIFO consume more resource, and handshake is a little complicated. If I have a multi bit signal "src", and it vary slowly, I ...
zaryleik's user avatar
  • 13
2 votes
1 answer
241 views

I am currently using an Arduino board and I need to connect an external 12V digital signal source to it. I have done it using an N-MOS. The external switch can provide 12 V to the gate pin. I am using ...
Kartikey Chandnao's user avatar
  • 41
-1 votes
1 answer
126 views

I have been studying the clock muxed from this source: https://vlsitutorials.com/glitch-free-clock-mux/ In this and many other websites, the clock mux is a flip-flop-based circuit. From what I ...
Erinç Utku Öztürk's user avatar
  • 11
0 votes
1 answer
90 views

I am self taught programmer, so never really grasp the fundamentals and deeper understanding for computer. So for last few weeks i been learning about digital processing and how everything works ...
Filip Cacic's user avatar
  • 11
0 votes
1 answer
128 views

I am designing the hardware necessarily for interfacing resistive matrix of 40×40 sensor with MCU. I maintained 3 of 1×16 DEMUX (via selection pins, input routes to one channel out of 16 channels at ...
Abdurahman hamdi's user avatar
  • 11
1 vote
1 answer
296 views

I am redesigning the control panel for a project I have been working on. I am using a rotary encoder to replace a set of 3 rotary dials, but I cannot use any microcontrollers or programming. I plan on ...
Engineer1's user avatar
  • 305
1 vote
1 answer
111 views

I am trying to implement clock gating logic manually using a latch and an AND gate as shown in the figure. The latch has an enable (en) and a done signal which are ...
rachana's user avatar
  • 19
0 votes
0 answers
82 views

Before we start, I am a complete newbie and I am not an electrical engineer at all. I have to synchronize two cameras. One is a Realsense D435 and the other one is an EVK1 HD. The D435 outputs a ...
Edoardo Mauriello's user avatar
  • 1
4 votes
4 answers
913 views

What's the effect of a strong* static magnetic field on a modern CMOS logic integrated circuit, like a CPU ? Can it significantly reduce noise margin or increase power consumption, ultimately causing ...
fgrieu's user avatar
  • 2,085
-1 votes
1 answer
100 views

I want to design a bidirectional synchronous mod‑16 counter using two mod‑8 counters, with synchronous reset and direction control. I began with a straightforward bidirectional mod‑16 counter and its ...
Pizza's user avatar
  • 193
1 vote
2 answers
175 views

I’m working in Logisim‑evolution 2.7.1 and I have to implement a 64‑to‑1 multiplexer using ONLY the built‑in 16‑to‑1 MUX components (I imposed this restriction). The standard two‑level tree seems ...
Pizza's user avatar
  • 193
0 votes
0 answers
78 views

I'm not that good at electronics, coming from software background but I studied EE. I'm trying to replicate and use the same sensor matrix as shown in the product here T-Scan Training Software 9.0 | ...
andre's user avatar
  • 17
1 vote
2 answers
128 views

1. Control Models Master / Slave The master controls the communication line (decides when to transmit or receive). The slave transmits or receives under the master’s command. Peer‑to‑Peer (symmetric) ...
Pizza's user avatar
  • 193

1
2 3 4 5
…
101