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3 votes
1 answer
91 views

I have 4 buttons on an FPGA dev board so I wrote function [HEX0] = Bar(KEY) n = uint8(sum(KEY, 'native')); ... Unfortunately, HDL Coder turned it into the following chunk of VHDL: y := '0'; FOR ...
Dmitri Nesteruk's user avatar
1 vote
0 answers
33 views

I'm trying to generate a vhdl code using the HDL code generator in Matlab. I have a matlab function and its test bench. This is the matlab function: function [received_signal_real, ...
user25608955's user avatar
1 vote
0 answers
262 views

Currently I am trying to follow the MathWorks tutorial 1 to register a TE0720 with a TE0701-6 carrier board in Matlab. I followed the instructions, designed the block design and exported it as advised....
fukurai's user avatar
  • 114
1 vote
0 answers
108 views

I am trying to program a module in Matlab that will be translated to Verilog. My module has a lot of inputs, so I want to group them into a unique string of bits so the module will have only one input....
Rodrigo Serna Pérez's user avatar
1 vote
0 answers
185 views

I am trying to perform cosimulation in HDL Coder using ModelSim 10.2c .But getting below error : Failed Cannot connect to 'Mentor Graphics ModelSim' HDL simulator Does any one know what could be ...
Haider's user avatar
  • 13
1 vote
0 answers
433 views

I am trying to covert a matlab code into VHDL using HDL Coder. When I try to simulate my model it gives me the error : Illegal Fixed-Point Data Type: the numbers of bits exceeded the supported ...
Qamar's user avatar
  • 23
0 votes
1 answer
941 views

I have an incoming packet that reads 7E0302403F387E from a serial port. start and end flag is 7E, FCS/CRC is 3F38 and the data is 030240. The FCS is calculated per the algorithm specified in RFC 1662. ...
MuGa's user avatar
  • 27
0 votes
1 answer
231 views

My question is quite basic to most appropriate levels on consideration. I lack the perception of how can I dump or implement my matlab code on a hardware component like processors or fpga? For eg: ...
Sukshith Shetty's user avatar
0 votes
1 answer
424 views

I have coded an algorithm using MATLAB R2019 script and i want it to be called in an System verilog file i.e The output generated by the matlab script is actually to be fed into the testbench ...
Ansuman Mishra's user avatar
0 votes
1 answer
1k views

Thanks in advance, I am having a simple Simulink model, that takes in a 32-bit number in the IEEE-754 format and adds the same number, which gives the output again in the 32-bit wide IEEE-754 format. ...
saikumar's user avatar
  • 179
0 votes
1 answer
964 views

I have an HDLC frame like blow and I want to calculate the HCS and FCS algorithm. Its based on DLMS protocol noted in green book page 128. Here is an example of this frame: Ex.1: Frame=`(...
Pitter's user avatar
  • 1
0 votes
1 answer
147 views

I am working with a MATLAB function that uses numbers in the binary base. To do so it uses the function dec2bin to transform an integer into a char array containing the binary information. The issue ...
videbar's user avatar
  • 33
0 votes
1 answer
81 views

I have a simple Simulink model that I want to build into FPGA code compatible with NI FPGA targets. I have installed the HDL Coder and the HDL Coder Support Package for NI FPGA Targets. When I try ...
Jordan Calvert's user avatar
0 votes
1 answer
252 views

I want to use HDL coder to convert MATLAB xcorr function to VHDL language. My code is given in below, i think i made a mistake when I'm defining the input data types. What should be the input data ...
Mehmet Şerefoğlu's user avatar
0 votes
1 answer
324 views

I am not able to get this error removed. Can someone please help me. The problem is it is showing some error in step 4 while generation of hdl code. function [Rxx]=autom(X) % [Rxx]=autom(x) Rxx=...
maudood ahmed's user avatar
0 votes
0 answers
144 views

I received this error message when I try the conversion via HDL coder. Can someone help me? Thank you! function [p_max,t_max]=ricmax(g,fs) valmin=0.40*max(g); [p_max,t_max]=...
petril's user avatar
  • 1
0 votes
1 answer
618 views

I've made a Matlab program where it detects if 2 circles intersect each other and outputs the coordinates of the intersections. Now, I'm trying to convert the code into vhdl for FPGA implementation. ...
user3488736's user avatar
0 votes
0 answers
22 views

In attached picture a model is given with 3 inputs and 3 outputs. I would like to run this model 10 times in loop. Kindly does any one know how I can use outputs as inputs from second run till 10th ...
Qamar's user avatar
  • 23
0 votes
1 answer
755 views

I am sorry If I say some thing silly.Please forgive me: I am trying to convert Matlab code(given below) to VHDL code,using HDL coder.It contains a function called sum.But when I try to convert the ...
Haider's user avatar
  • 13
0 votes
0 answers
559 views

I am attempting to create a simple DDS/NCO to be used in an FPGA. I have a working DDS in simulink. But when I try to convert it to HDL using the HDL converter I receive the above error. The only ...
Jean-Christophe Robertson's user avatar
-3 votes
1 answer
1k views

I have a system in Simulink/HDL coder (see below image please). I have 3 outputs and 3 inputs. I want my system to run 10 times. After each iteration it should select the outputs and use them as ...
jutt veer's user avatar